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| Hi, I am a fifth year Ph.D. student, working on verifying hardware protocols. My advisor is Prof. Ganesh Gopalakrishnan. I obtained my B.S. from University of Science and Technology of China in 2000 and M.E. from Chinese Academy of Sciences in 2003. I started working on verification since 2005. Before that, I did some work in middleware and distributed systems. |
| Publications |
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Efficient stateful dynamic partial order reduction Yu Yang, Xiaofang Chen, Ganesh Gopalakrishnan and Robert M. Kirby SPIN Workshop on Model Checking Software, SPIN 2008
Hierarchical cache coherence protocol verification one level at a time through assume guarantee
Transaction based modeling and verification of hardware protocols
Partial order reduction based verification of threaded software
Reducing verification complexity of a multicore coherence protocol using assume/guarantee |
| Other papers |
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An interface aware guided search method for error trace justication in large
protocols Xiaofang Chen, Yu Yang, Ganesh Gopalakrishnan and Ching-Tsun Chou Technical report UUCS-08-005, School of Computing, University of Utah
Transaction based modeling and verification of hardware protocols
BT: a bounded transaction model checking for cache coherence protocols
Predicate abstraction for Murphi using CVC-Lite
Performance optimization for a distributed transaction manager
Survey of transaction processing technologies |
| Personal |
| Yu Yang's homepage |