REFEREED PUBLICATIONS


[ISCA 2012] LOT-ECC: LOcalized and Tiered Reliability Mechanisms for Commodity Memory Systems.

Aniruddha N. Udipi, Naveen Muralimanohar (HP Labs), Rajeev Balasubramonian, Al Davis, Norm Jouppi (HP Labs), 39th International Symposium on Computer Architecture, Portland, June 2012 [pdf] [ppt]

Acceptance rate: 18%

[ISCA 2011] Combining Memory and a Controller with Photonics through 3D-Stacking to Enable Scalable and Energy-Efficient Systems.

Aniruddha N. Udipi, Naveen Muralimanohar (HP Labs), Rajeev Balasubramonian, Al Davis, Norm Jouppi (HP Labs), 38th International Symposium on Computer Architecture, San Jose, June 2011 [pdf] [ppt] [CRA Research Highlight]

Acceptance rate: 19%

[ISCA 2010] Rethinking DRAM Design and Organization for Energy-Constrained Multi-Cores.

Aniruddha N. Udipi, Naveen Muralimanohar (HP Labs), Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Norm Jouppi (HP Labs), 37th International Symposium on Computer Architecture, Saint-Malo, June 2010 [pdf] [ppt]

Acceptance rate: 18%

[HPCA 2010] Towards Scalable, Energy-Efficient, Bus-Based On-Chip Networks.

Aniruddha N. Udipi, Naveen Muralimanohar (HP Labs), Rajeev Balasubramonian, 16th International Symposium on on High-Performance Computer Architecture, Bangalore, January 2010 [pdf] [ppt]

Acceptance rate: 18%

[HiPC 2009] Non-Uniform Power Access in Large Caches with Low-Swing Wires.

Aniruddha N. Udipi, Naveen Muralimanohar (HP Labs), Rajeev Balasubramonian, 16th International Conference on High Performance Computing, Kochi, December 2009 [pdf] [ppt]

Acceptance rate: 19%

(Best Paper Award)

[HPCA 2009] Optimizing Communication and Capacity in a 3D Stacked Reconfigurable Cache Hierarchy.

Niti Madan, Li Zhao (Intel), Naveen Muralimanohar, Aniruddha Udipi, Rajeev Balasubramonian, Ravishankar Iyer (Intel), Srihari Makineni (Intel), Donald Newell (Intel), 15th International Symposium on High-Performance Computer Architecture, Raleigh, February 2009 [pdf] [ppt]

Acceptance rate: 19%



REFEREED POSTERS


[HiPC 2009] Rethinking DRAM Design for Low-Power Datacenters.

Aniruddha N. Udipi, Naveen Muralimanohar (HP Labs), Niladrish Chatterjee, Rajeev Balasubramonian, 16th International Conference on High Performance Computing, Kochi, December 2009

(Best Poster Presentation Award)