I am advised by Prof. Rajeev Balasubramonian at Utah, and by Dr. Norm Jouppi and Dr. Naveen Muralimanohar at HP Labs. My research interests lie primarily in computer engineering and hardware systems. As part of my dissertation research, I have studied various aspects of main memory system architecture. Specifically, I have worked on the design of energy-efficient DRAM microarchitectures, high-bandwidth silicon-photonic memory channels, streamlined processor-memory communication protocols, and efficient fault-tolerance mechanisms. Earlier in my graduate career, I worked on scalable on-chip interconnects, both at the inter-core level, and the intra-bank level inside large caches. For more details, please see my publications.

Spring 2010 onwards
Intelligent Infrastructure Lab, HP Labs, Palo Alto, California

Summer 2008
Nehalem Power Focus Group, Intel, Hillsboro, Oregon
Fall 2009
CS 6460 - Operating Systems

Spring 2009
CS 7960 - Advanced Computer Architecture
CS 5470 - Compilers

Fall 2008
CS 6745 - Testing and Verification of Digital Circuits

Spring 2008
CS 7820 - Advanced Parallel Architecture
CS 6740 - CAD of Digital Circuits

Fall 2007
CS 6710 - Digital VLSI design
CS 6810 - Computer Architecture
Fall 2007
CS 3810 - Computer Organization