Research

My research revolves around Memory Systems. I am interested in DRAM as well as Non-Volatile memory systems.
Link to my Google Scholar profile.

Publications

Addressing Service Interruptions in Memory with Thread-to-Rank Assignment (Best Paper Award)
Manjunath Shevgoor, Niladrish Chatterjee, Rajeev Balasubramonian, June-Sik Kim,
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2016) ,Sweden, April 2016.

Efficiently Prefetching Complex Address Patterns(slides)
Manjunath Shevgoor, Sahil Koladiya, Rajeev Balasubramonian, Seth Pugsley, Chris Wilkerson and Zeshan Chishti,
48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-48) ,Hawaii, December 2015.

Avoiding Information Leakage in the Memory Controller with Fixed Service Policies
Ali Shafiee, Akhila Gundu, Manjunath Shevgoor, Rajeev Balasubramonian and Mohit Tiwari, 48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-48) ,Hawaii, December 2015.

Improving Memristor Memory with Sneak Current Sharing
Manjunath Shevgoor, Naveen Muralimanohar, Rajeev Balasubramonian and Jeon Yoocharn, 33rd IEEE International Conference on Computer Design (ICCD) , New York, October 2015.

Efficiently Prefetching Complex Address Patterns
Manjunath Shevgoor, Sahil Koladiya, Rajeev Balasubramonian and Zeshan Chishti, The 2nd Data Prefetching Championship (DPC2) (held in conjunction with ISCA-42), Portland, June 2015.

Designing a Fast and Reliable Main Memory with Memristor Technology (ppt)
Manjunath Shevgoor, Naveen Muralimanohar and Rajeev Balasubramonian, 6th Non-Volatile Memories Workshop (NVMW), San Diego, March 2015.

A Case for Near Data Security
Akhila Gundu, Ali Shafiee Ardestani, Manjunath Shevgoor, and Rajeev Balasubramonian, WoNDP: 2nd Workshop on Near-Data Processing (held in conjunction with MICRO-47) , Cambridge , December 2014

Quantifying the Relationship between the Power Delivery Network and Architectural Policies in a 3D-Stacked Memory Device (ppt)
Manjunath Shevgoor, Jung-Sik Kim, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Aniruddha N.Udipi, 46th International IEEE/ACM Symposium on Microarchitecture (MICRO-46) , Davis, December 2013

Understanding the Role of the Power Delivery Network in 3D-Stacked Memory Devices
Manjunath Shevgoor, Jung-Sik Kim, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Aniruddha N.Udipi, 5th Workshop on Energy Efficient Design (held in conjunction with ISCA-40), Tel Aviv, June 2013

Leveraging Heterogeneity in DRAM Main Memories to Accelerate Critical Word Access
Niladrish Chatterjee, Manjunath Shevgoor, Rajeev Balasubramonian, Al Davis, Zhen Fang, Ramesh Illikkal, Ravi Iyer, 45th International Symposium on Microarchitecture (MICRO-45) , Vancouver, December 2012

USIMM: The Utah Simulated Memory Module
Niladrish Chatterjee, Rajeev Balasubramonian, Manjunath Shevgoor, Seth H. Pugsley, Aniruddha N. Udipi, Ali Shafiee, Kshitij Sudan, Manu Awasthi, Zeshan Chishti, Technical Report UUCS-12-002, February 2012.

Efficient Scrub Mechanisms for Error-Prone Emerging Memories
Manu Awasthi, Manjunath Shevgoor, Kshitij Sudan, Rajeev Balasubramonian, Bipin Rajendran, Viji Srinivasan 18th International Symposium on High-Performance Computer Architecture (HPCA-18) , New Orleans, February 2012.

Handling PCM Resistance Drift with Device, Circuit, Architecture, and System Solutions
Manu Awasthi, Manjunath Shevgoor, Kshitij Sudan, Rajeev Balasubramonian, Bipin Rajendran, Viji Srinivasan 2nd Non-Volatile Memories Workshop (NVMW), San Diego, March 2011.

© 2012 Manjunath Shevgoor
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