Hello
I am a third year PhD student working in the UtahArch group under the guidance of Prof. Rajeev Balasubramonian.
After I finished my Undergrad from RVCE, Bangalore, India in 2006, I spent the next four years doing a variety of things in VLSI Design. I worked at Softjin Technologies, Bangalore, India for a year developing Design-For-Test methodologies for 3D Die-stacked ICs, followed by a brief (but very exciting) stint at Montalvo Systems before it went belly up at the start of the recession in 2008. At Montalvo I was developing a Full-Chip Timing Analysis Flow for a low power processor.
I joined AMD in 2008 where, for two years, I worked on Synthesys, Placement, Routing, EMIR, SoC Floorplanning and semi-custom design
I joined the School of Computing at the U of U in Fall 2010
© 2012 Manjunath Shevgoor
Template design by Andreas Viklund