Highly Efficient Synchronization Based on Active Memory Operations.
L.Zhang, Z.Fang and J.Carter,
In the Proceedings of the International Parallel and
Distributed Processing Symposium (IPDPS), April 2004.
A Cost Model for Integrated Restructuring Optimizations.
B. Chandramouli, W.C. Hsieh, J.B. Carter, and S.A. McKee.
In the Journal on Instruction-Level Parallelism,
Vol. 5, Aug 2003.
A Novel 32-bit Scalable Multiplier Architecture.
Y.Kolla, Y.-B Kim, J.B.Carter.
In the Proceedings of the Great Lakes Symposium on VLSI,
pp.241-244, April 2003.
Restructuring Computations for Temporal Data Cache Locality.
V.K. Pingali, S.A. McKee, W.C. Hsieh and J.B. Carter.
International Journal on Parallel Processing,
Vol. 31, No. 4, Aug 2003, pp. 305-338.
Computation Regrouping: Restructuring Programs for Temporal
Data Cache Locality.
V.K. Pingali, S.A. McKee, W.S. Hsieh, and J.B. Carter.
In the Proceedings of the International Conference on Supercomputing
(ICS '02), pp. 252-261, June 2002. Best student paper award.
The Impulse Memory Controller
L.Zhang, Z.Fang, M.A.Parker, B.K.Mathew,
L.Schaelicke, J.B.Carter, W.C.Hsieh, and S.A.McKee.
IEEE Transactions on Computers, Vol. 50, No. 11,
pp. 1117-1132, Nov 2001.
A Cost Framework for Evaluating Integrated Restructuring Optimizations.
B.Chandramouli, J.B.Carter, W.C.Hsieh, and S.A.McKee.
In the Proceedings of the International Conference on Parallel
Architectures and Compilation Techniques (PACT '01),
pp.131-140, September 2001.
Reevaluating Online Superpage Promotion with Hardware Support.
Z. Fang, L. Zhang, J.B. Carter, S.A. McKee, and W.C. Hsieh.
In the Proceedings of the Seventh International
Symposium on High Performance Computer Architecture,
PP. 63-72, January 2001.
Memory System Support for Dynamic Cache Line Assembly.
L. Zhang, V.K. Pingali, B. Chandramouli, and J.B. Carter,
in the Proceedings of the Second Workshop on Intelligent
Memory Systems, November 2000.
Algorithmic Foundations for a Parallel Vector Access Memory System.
B.K. Mathew, S.A. McKee, J.B. Carter, and A.L. Davis.
In the Proceedings of the 12th ACM Symposium on Parallel
Algorithms and Architectures, pp.156-165, July 2000.
Pointer-Based Prefetching within the Impulse Adaptable Memory
Controller: Initial Results.
L. Zhang, S.A. McKee, W.C. Hsieh, and J.B. Carter.
In the Proceedings of the ISCA 2000 Workshop on Solving
the Memory Wall Problem, June 2000.
Online Superpage Promotion Revisited.
Z. Fang, L. Zhang, J.B. Carter, S.A. McKee, and W.C. Hsieh,
In the Proceedings of the International Conference on
Measurement and Modeling of Computer Systems (SIGMETRICS 2000),
pp.114-115, June 2000.
Design of a Parallel Vector Access Unit for
SDRAM Memory Systems.
B.K. Mathew, S.A. McKee, J.B. Carter, and A.L. Davis.
In the Proceedings of the Sixth International Symposium on
High Performance Computer Architecture, January 2000.
Memory System Support for Image Processing.
L. Zhang, J.B. Carter, W. Hsieh, and S.A. McKee.
In the Proceedings of the 1999 International
Conference on Parallel Architectures and Compilation Techniques,
October 1999.
Impulse: Memory System Support for Scientific Applications.
J.B. Carter, W. Hsieh, L. Stoller, M. Swanson, L. Zhang, and S.A. McKee.
In the Journal of Scientific Programming, Vol. 7, No. 3-4,
pp. 195-209, 1999.
Impulse: Building a Smarter Memory Controller.
J.B. Carter, W.C. Hsieh, L.B. Stoller, M.R. Swanson,
L. Zhang, E.L. Brunvand, A. Davis, C.-C. Kuo,
R. Kuramkote, M.A. Parker, L. Schaelicke, and T. Tateyama.
In the Proceedings of the Fifth International Symposium on
High Performance Computer Architecture, pp. 70-79, January 1999.
Increasing TLB Reach Using Superpages Backed by Shadow Memory.
M. Swanson, L. Stoller, and J. Carter,
In the Proceedings of the 25th Annual International Symposium
on Computer Architecture, pp. 204-213, June 1998.
Memory System Support for Irreg
ular Applications.
J. Carter, W. Hsieh, M. Swanson, A. Davis, M. Parker, L. Schaelicke,
L. Stoller, T. Tateyama, and L. Zhang.
In Languages, Compilers and Run-Time Systems for Scalable
Computers, D. O'Hallaron (editor),
Springer-Verlag Lecture Notes in Computer Science 1511, pp. 17-26, 1998.
A Lightweight Secure Cyberforaging
Infrastructure for Resource-Constrained Devices
S. Goyal and J. Carter.
In the
Proceedings of the Sixth IEEE Workshop on
Mobile Computing Systems and Applications.
Supporting Persistent C++ Objects in a Distributed Storage System.
A.Ranganathan, Y.Izrailevsky, S.Susarla, J.Carter, and
G.Lindstrom. In the Proceedings of the 1999 Workshop on
Compiler Support for Systems Software, pp.64-71, May 1999.
Khazana: An Infrastructure for Building Distributed Services.
J.B. Carter, A. Ranganathan, and S. Susarla.
In the Proceedings of the 18th Annual International Conference
on Distributed Computing Systems, pp. 562-571, May 1998.
Fast Synchronization on Shared-Memory Multiprocessors:
An Architectural Approach.
Z. Fang, L. Zhang, J. Carter, L. Cheng, and M. Parker.
In the Special Issue of the Journal of Parallel and Distributed
Computing on the Design and Performance of Networks for Super-,
Cluster-, and Grid-Computing. Vol. 65, No. 10, pp. 1158-1170,
Oct 2005.
Fast Barriers for Scalable ccNUMA Systems.
L. Cheng and J.B. Carter, In the Proceedings of the International
Conference on Parallel Processing (ICPP'05), June 2005.
Scalable Barriers for Large-scale Shared Memory Multiprocessors.
Z. Fang, L. Zhang, J. Carter and M. Parker.
In the International Journal of High Performance Computing
and Networking, Vol. 1, No. 1/2/3, pp. 33-42, 2004.
Supporting Multiple Coherence Protocols in Programmable
Shared Memory Controllers.
R.Kuramkote, J.B.Carter, and C.-C.Kuo.
In the Proceedings of the Eighth Workshop on Scalable
Shared Memory Multiprocessors, pp. 6-7, May 1999.
MP-LOCKS: Replacing H/W Synchronization Primitives with Message Passing.
C.-C. Kuo, J.B. Carter, and R. Kuramkote.
In the Proceedings of the Fifth International Symposium on
High Performance Computer Architecture, pp. 284-288, January 1999.
Design Alternatives for Shared Memory Multiprocessors.
J.B. Carter, C.-C. Kuo, R. Kuramkote, and M. Swanson.
In the Proceedings of the Fifth International Conference on
High Performance Computing (HiPC '98), pp. 41-50, December 1998.
AS-COMA: An Adaptive Hybrid Shared Memory Architecture.
C.-C. Kuo, J. Carter, R. Kuramkote, and M. Swanson.
In the Proceedings of the 1998 International Conference on Parallel
Processing (ICPP '98), pp. 207-216, August 1998.
Analysis of Avalanche's Shared Memory Architecture.
R. Kuramkote, J. Carter, A. Davis, C. Kuo, L. Stoller, and M. Swanson.
Technical report UUCS-97-008,
Department of Computer Science,
University of Utah.
Reducing Consistency Traffic and Cache Misses in the
Avalanche Multiprocessor.
J. Carter, R. Kuramkote, and C. Kuo.
Technical report UUCS-96-002,
Department of Computer Science,
University of Utah.
Avalanche: A Communication and Memory Architecture for
Scalable Parallel Computing.
J.B. Carter, A. Davis, R. Kuramkote, C.-C. Kuo, L.B. Stoller, and M. Swanson,
Technical report UUCS-95-023,
Department of Computer Science,
University of Utah.
Reducing Consistency Traffic and Cache Misses in the Avalanche
Multiprocessor.
J.B. Carter, R. Kuramkote, and C.-C. Kuo,
University of Utah technical report.
An Argument for Simple COMA.
A. Saulsbury, T. Wilkinson, J. Carter, A. Landin.
In the Journal of Future Generation Computer Systems (FGCS),
Vol. 11, No. 6, October 1996.
Also in the Proceedings of the First Annual Symposium on High Performance
Computer Architecture, pp. 276-285, January 1995.
SiCO: A Simple COMA Implementation.
A. Saulsbury, J.B. Carter, and A. Landin,
Swedish Institute of Computer Science technical report.
Adaptive Software Cache Management for Distributed Shared
Memory Architectures.
J.K. Bennett, J.B. Carter, and W. Zwaenepoel.
In Proceedings of the 17th International Symposium on Computer
Architecture (ISCA), pp. 125-135, May 1990.
Wire Management for Coherence Traffic in Chip Multiprocessors.
L. Cheng, N. Muralimanohar, K. Ramani, R. Balasubramonian, and
J.B. Carter.
In the Proceedings of the 6th Workshop on Complexity-Effective
Design (WCED), June 2005.
Techniques for Reducing
Consistency-Related Communication in Distributed Shared Memory
Systems.
J.B. Carter, J.K. Bennett, and W. Zwaenepoel.
ACM Transactions on Computer Systems,
Vol. 13, No. 3, pp. 205-243, August 1995.
Design of the Munin Distributed Shared Memory System.
J.B. Carter.
In the Journal of Parallel and Distributed Computing,
Vol. 11, No. 6, pp. 219-227, September 1995.
Distributed Shared Memory: Where We Are and Where We Should Be Headed.
J.B. Carter, D. Khandekar, and L. Kamb.
In the Proceedings of the Fifth Workshop on Hot Topics in Operating
Systems,
pp. 119-122, May 1995.
Network Multicomputing Using Recoverable Distributed Shared Memory.
J.B. Carter, A. Cox, S. Dwarkadas, E. Elnozahy, D. Johnson, P. Keleher, S.
Rodrigues, W. Yu, and W. Zwaenepoel.
In the Proceedings of COMPCON '93, pp. 519-527, February 1993.
Implementation and Performance of Munin.
J.B. Carter, J.K. Bennett, and W. Zwaenepoel.
In Proceedings of the Thirteenth Symposium on Operating Systems
Principles (SOSP), pp. 152-164, October 1991.
Apparatus and Method of Controlling Data Sharing on a Shared Memory
Computer System.
Inventors: John Carter, Randal S. Passint, Liqun Cheng, and
Donglai Dai. Submitted April 28, 2006.
Node Synchronization for Multiprocessor Computer Systems.
Inventors: John Carter, Randal S. Passint, Donglai Dai,
and Zhen Fang. Submitted April 25, 2005.
System and Method for Performing Address Translation in a
Computer System.
Inventors: Steven C. Miller, Martin M. Deneroff,
Curt F. Schimel, J. Carter, Lixin Zhang, Michael A. Parker.
Submitted December 6, 2004.
Shared Client-side Web Caching Using Globally Addressable Memory;
U.S. Patent No. 6,026,474.
Inventors: J.B. Carter, S.H. Davis, D.J. Dietterich, S.J. Frank,
and H.S. Lee.
Issued February 15, 2000.
Remote Access and Geographically Computers in a Globally Addressable
Storage Environment;
U.S. Patent No. 5,987,506.
Inventors: J. Carter, S. Davis, and S. Frank.
Issued November 16, 1999.
Shared Memory Computer Networks;
U.S. Patent No. 6,148,377.
Inventors: J. Carter,
S. Davis, D. Dietterich, S. Frank, R. Phillips, J. Woods, D. Porter,
and H. Lee.
Issued November 14, 1999.
Structured Data Storage Using Globally Addressable Memory;
U.S. Patent No. 5,918,229.
Inventors: S. Davis, J. Carter, S. Frank, H. Lee, and
D. Dietterich.
Issued June 29, 1999.
System and Method for Providing High Availability Data Storage Using
Globally Addressable Memory;
U.S. Patent No. 5,909,540.
Inventors: J. Carter, S. Davis, D. Dietterich, S. Frank,
R. Phillips, J. Woods, D. Porter, and H. Lee.
Issued June 1, 1999.
Distributed Operating Systems Based on a Protected Global Virtual
Address Space.
J.B. Carter, A. Cox, D. Johnson, and W. Zwaenepoel.
In the Proceedings of the Third Workshop on Workstation Operating Systems
(WWOS), May 1992.
Optimistic Implementation of Bulk Data Transfer Protocols.
J.B. Carter and W. Zwaenepoel.
In Proceedings of the 1989 Sigmetrics Conference,
pp. 61-69, May 1989.