Email: my first name @ cs.utah.edu
50 S. Central Campus Drive, Rm. 3414,
Salt Lake City, UT 84112
Ph: 801-581-4553; Fax: 801-581-5843
ASPLOS 2014 |
Detailed research page |
Full publication list |
Teaching page |
Utah Arch Research Group |
Recent Contributions (Full list of publications) :
Other Selected Publications (Full list of publications) :
My research focuses on many aspects of computer architecture. I am
especially interested in studying how future technology trends
influence the design of microprocessors.
Current projects include:
- Memory Systems : optimizing memory controller and DRAM behavior for high performance and low energy.
- Large cache design : methodologies to model large NUCA cache hierarchies, policies to organize data, reconfiguration within the hierarchy, on-chip network innovations, organizations in 3D.
- Reliability : memory reliability and efficient verification of on-chip computation and communication.
- Interconnect design : leveraging different wires in a heterogeneous network for architectural innovation.
- Transactional memory : innovations for scalable hardware transactional memory.
Multi-Core Cache Hierarchies , Rajeev Balasubramonian, Norman P. Jouppi, Naveen Muralimanohar, Synthesis Lectures in Computer Architecture , Morgan and Claypool Publishers, 2011.
( CACTI mirror site )
I teach CS 7810 Advanced Computer Architecture
in the Spring semester and
CS 6810 Computer Architecture
in the Fall semester.
I also organize the
Architecture Reading Club every semester.
Courses taught in the past (including
CS 3810 ,
CS 6810 ,
CS 7810 ,
CS 7820 ).
- Naveen Muralimanohar , Ph.D. September 2008, Wire-Aware Cache Architectures , First employment: HP Labs.
- Niti Madan , Ph.D. January 2009, Leveraging Mixed-process 3D Die Stacking Technology for Cache Hierarchies and Reliability , First employment: Computing Innovation Fellow at IBM T.J. Watson, Current employment: Oracle.
- Manu Awasthi , Ph.D. September 2011, Managing Data Locality in Future Memory Hierarchies Using a Hardware Software Co-Design Approach , First employment: Micron.
- Aniruddha Udipi , Ph.D. March 2012, Designing Efficient Memory for Future Computing Systems , First employment: ARM.
- Kshitij Sudan , Ph.D. October 2012, Data Placement in Modern Memory Systems , First employment: Samsung.
- Vivek Venkatesan , M.S. December 2007, Criticality of On-Chip Wires , First employment: Sun (currently, Oracle).
- Niladrish Chatterjee , Ph.D. student, Memory Scheduling
- Seth Pugsley (brace yourself... this link has stunning graphics and Flash) , Ph.D. student, Processing Near Memory
- Manju Shevgoor , Ph.D. student, Memory Systems
- Ali Shafiee , Ph.D. student, Memory Systems
- Co-advising Dave Nellans , Ph.D. student, Optimizing OS Execution
- Byong Wu Chong, M.S. student, Transactional Memory
Life outside work
My blood pressure as an Assistant Professor was 30 points lower than what
it was as a grad student. Must have something to do with a
and a wonderful sport.
And now, the newest distractions: Shurik