Naveen Muralimanohar
Exascale Computing Lab,
Hewlett-Packard Company
1501 Page Mill Road, Bldg. 3, MS 1183
Palo Alto, CA 94304
Email: naveen.muralimanohar at hp.com
Tel: (650) 857 5752

I defended my thesis in summer 2008 and have joined the Exascale computing lab at HP. You will be redirected to my new page shortly.

Updates

CACTI 6.0 is now available for download. Please follow this link to get the latest version.

The paper submission site for this year's CMP-MSI workshop (to be held in conjunction with ISCA'08) is up and running. The deadline for the workshop is April 18th.

The workshop accepts two different kinds of papers: regular eight page technical papers or three page position papers on research directions. Check out the main workshop page for more information.

We recently had a colloquium on multi-core architecture. Various research groups at School of Computing expressed their views on chip multi-processor and its influence on their research. More details about the colloqium and the presentation slides can be found here.
I am organizing architecture reading club this semester. Check out the website for the list of papers we will be discussing.

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