Selected representative publications:
[MICRO 07] Optimizing NUCA Organizations and Wiring Alternatives for Large Caches With CACTI 6.0
[ISCA 07] Interconnect Design Considerations for Large NUCA Caches
[ISCA 06] Interconnect-Aware Coherence Protocols for Chip Multiprocessors
[ISPASS 06] Power Efficient Resource Scaling in Partitioned Architectures through Dynamic Heterogeneity
[HPCA 05] Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Contact:
Email: naveen at cs.utah.edu
Tel: (801) 856-4784