Index: lamix/interrupts/traphandlers.c =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/lamix/interrupts/traphandlers.c,v retrieving revision 1.4 retrieving revision 1.5 diff --context -r1.4 -r1.5 *** lamix/interrupts/traphandlers.c 2002/10/25 20:24:32 1.4 --- lamix/interrupts/traphandlers.c 2003/05/22 21:55:15 1.5 *************** *** 79,85 **** *(unsigned int*)(regs + OFF_STACK_TPC), *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); ! HALT(); } enable_intr(); --- 79,85 ---- *(unsigned int*)(regs + OFF_STACK_TPC), *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); ! abort(-1); } enable_intr(); *************** *** 220,226 **** *(unsigned int*)(regs + OFF_STACK_TPC), *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); ! HALT(); } --- 220,226 ---- *(unsigned int*)(regs + OFF_STACK_TPC), *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); ! abort(-1); } *************** *** 270,276 **** *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); kprint1("Instruction:", *pc); ! HALT(); } --- 270,276 ---- *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); kprint1("Instruction:", *pc); ! abort(-1); } *************** *** 325,331 **** *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); kprint1("Instruction:", instr); ! HALT(); } --- 325,331 ---- *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); kprint1("Instruction:", instr); ! abort(-1); } *************** *** 375,381 **** *(unsigned int*)(regs + OFF_STACK_TPC), *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); ! HALT(); } --- 375,381 ---- *(unsigned int*)(regs + OFF_STACK_TPC), *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); ! abort(-1); } *************** *** 424,430 **** *(unsigned int*)(regs + OFF_STACK_TPC), *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); ! HALT(); } --- 424,430 ---- *(unsigned int*)(regs + OFF_STACK_TPC), *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); ! abort(-1); } *************** *** 517,523 **** *(unsigned int*)(regs + OFF_STACK_TPC), *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); ! HALT(); } --- 517,523 ---- *(unsigned int*)(regs + OFF_STACK_TPC), *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); ! abort(-1); } *************** *** 570,576 **** *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); kprint1("Page table entry:", read_pagetable(p->context_r, bad_addr)); ! HALT(); } --- 570,576 ---- *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); kprint1("Page table entry:", read_pagetable(p->context_r, bad_addr)); ! abort(-1); } *************** *** 676,682 **** *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); kprint1("Page table entry:", read_pagetable(p->context_r, bad_addr)); ! HALT(); } --- 676,682 ---- *(unsigned int*)(regs + OFF_STACK_TNPC), *(unsigned int*)(regs + OFF_STACK_I7)); kprint1("Page table entry:", read_pagetable(p->context_r, bad_addr)); ! abort(-1); } Index: lamix/kernel/kernel.c =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/lamix/kernel/kernel.c,v retrieving revision 1.7 retrieving revision 1.8 diff --context -r1.7 -r1.8 *** lamix/kernel/kernel.c 2002/10/25 20:24:34 1.7 --- lamix/kernel/kernel.c 2003/05/22 21:55:16 1.8 *************** *** 833,839 **** current_procs = 0; ! halt(0); return(0); } --- 833,839 ---- current_procs = 0; ! terminate(0); return(0); } Index: lamix/kernel/kernel.h =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/lamix/kernel/kernel.h,v retrieving revision 1.5 retrieving revision 1.6 diff --context -r1.5 -r1.6 *** lamix/kernel/kernel.h 2002/10/25 20:24:34 1.5 --- lamix/kernel/kernel.h 2003/05/22 21:55:16 1.6 *************** *** 91,100 **** extern char **argv_global, **envv_global; ! #define READ_SYSCONTROL(i) *(int*)(SYSCONTROL_LOCAL_LOW + i) #define CPU_ID READ_SYSCONTROL(SC_CPU_ID) #define NODE_ID READ_SYSCONTROL(SC_NODE_ID) #define CURRENT_PROCESS (cpu[CPU_ID].current_proc) #define NEED_RESCHEDULE (cpu[CPU_ID].need_reschedule) --- 91,102 ---- extern char **argv_global, **envv_global; ! #define READ_SYSCONTROL(i) *(int*)(SYSCONTROL_LOCAL_LOW + i) ! #define WRITE_SYSCONTROL(i, v) *(int*)(SYSCONTROL_LOCAL_LOW + i) = (v); #define CPU_ID READ_SYSCONTROL(SC_CPU_ID) #define NODE_ID READ_SYSCONTROL(SC_NODE_ID) + #define HALT(v) WRITE_SYSCONTROL(SC_HALT, v) #define CURRENT_PROCESS (cpu[CPU_ID].current_proc) #define NEED_RESCHEDULE (cpu[CPU_ID].need_reschedule) Index: lamix/kernel/misc.S =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/lamix/kernel/misc.S,v retrieving revision 1.3 retrieving revision 1.4 diff --context -r1.3 -r1.4 *** lamix/kernel/misc.S 2002/10/25 20:24:34 1.3 --- lamix/kernel/misc.S 2003/05/22 21:55:16 1.4 *************** *** 767,772 **** --- 767,775 ---- !---------------------------------------------------------------------- ! change process stack and frame pointer + rdpr %pstate, %g4 + andn %g4, PSTATE_IE, %g4 + wrpr %g4, 0, %pstate rdpr %pil, %g4 set IPL_HIGH, %g2 wrpr %g2, 0, %pil *************** *** 917,926 **** membar #Sync - retl wrpr %g2, 0, %pil ! ! --- 920,931 ---- membar #Sync wrpr %g2, 0, %pil ! rdpr %pstate, %g2 ! or %g2, PSTATE_IE, %g2 ! restore ! retl ! wrpr %g2, 0, %pstate *************** *** 943,948 **** --- 948,956 ---- !---------------------------------------------------------------------- ! change process stack and frame pointer + rdpr %pstate, %g2 + andn %g2, PSTATE_IE, %g2 + wrpr %g2, 0, %pstate set IPL_HIGH, %g2 wrpr %g2, 0, %pil *************** *** 1028,1036 **** membar #Sync - retl wrpr %g2, 0, %pil ! --- 1036,1047 ---- membar #Sync wrpr %g2, 0, %pil ! rdpr %pstate, %g2 ! or %g2, PSTATE_IE, %g2 ! restore ! retl ! wrpr %g2, 0, %pstate Index: lamix/kernel/schedule.c =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/lamix/kernel/schedule.c,v retrieving revision 1.4 retrieving revision 1.5 diff --context -r1.4 -r1.5 *** lamix/kernel/schedule.c 2002/11/04 21:48:36 1.4 --- lamix/kernel/schedule.c 2003/05/22 21:55:16 1.5 *************** *** 151,156 **** --- 151,158 ---- void idler() { + int l; + for (;;) { #ifdef TRACE *************** *** 158,166 **** #endif userstat_sample(cpu[CPU_ID].idle_stat_handle, 0); ! while ((run_queue.head == NULL) && (current_procs > 0)); ! if (current_procs <= 0) ! halt(0); userstat_sample(cpu[CPU_ID].idle_stat_handle, 0); --- 160,172 ---- #endif userstat_sample(cpu[CPU_ID].idle_stat_handle, 0); ! l = splhigh(); ! while ((run_queue.head == NULL) && (current_procs > 0)) ! { ! HALT(l); ! l = splhigh(); ! } ! splx(l); userstat_sample(cpu[CPU_ID].idle_stat_handle, 0); Index: lamix/kernel/syscontrol.h =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/lamix/kernel/syscontrol.h,v retrieving revision 1.2 retrieving revision 1.3 diff --context -r1.2 -r1.3 *** lamix/kernel/syscontrol.h 2002/10/25 20:24:36 1.2 --- lamix/kernel/syscontrol.h 2003/05/22 21:55:16 1.3 *************** *** 85,90 **** --- 85,92 ---- #define SC_INTERRUPT_DATA 0x84 #define SC_FASTINT_CLEAR 0x90 + #define SC_HALT 0xA0 + #define SC_FASTINT 0xC0 #endif Index: lamix/mm/init.S =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/lamix/mm/init.S,v retrieving revision 1.4 retrieving revision 1.5 diff --context -r1.4 -r1.5 *** lamix/mm/init.S 2002/10/25 20:24:50 1.4 --- lamix/mm/init.S 2003/05/22 21:55:17 1.5 *************** *** 326,332 **** st %g1, [%sp + 2*REG_WIN_SIZE + OFF_STACK_TSTATE] st %g0, [%sp + 2*REG_WIN_SIZE + OFF_STACK_TPC] st %g0, [%sp + 2*REG_WIN_SIZE + OFF_STACK_TNPC] ! st %g0, [%sp + 2*REG_WIN_SIZE + OFF_STACK_TT] st %g0, [%sp + 2*REG_WIN_SIZE + OFF_STACK_Y] st %g0, [%sp + 2*REG_WIN_SIZE + OFF_STACK_PIL] st %g0, [%sp + 2*REG_WIN_SIZE + OFF_STACK_I0] --- 326,333 ---- st %g1, [%sp + 2*REG_WIN_SIZE + OFF_STACK_TSTATE] st %g0, [%sp + 2*REG_WIN_SIZE + OFF_STACK_TPC] st %g0, [%sp + 2*REG_WIN_SIZE + OFF_STACK_TNPC] ! set TRAP_SYSTRAP_08, %g1 ! st %g1, [%sp + 2*REG_WIN_SIZE + OFF_STACK_TT] st %g0, [%sp + 2*REG_WIN_SIZE + OFF_STACK_Y] st %g0, [%sp + 2*REG_WIN_SIZE + OFF_STACK_PIL] st %g0, [%sp + 2*REG_WIN_SIZE + OFF_STACK_I0] Index: lamix/syscall/kprint.c =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/lamix/syscall/kprint.c,v retrieving revision 1.2 retrieving revision 1.3 diff --context -r1.2 -r1.3 *** lamix/syscall/kprint.c 2002/10/25 20:24:57 1.2 --- lamix/syscall/kprint.c 2003/05/22 21:55:18 1.3 *************** *** 200,206 **** sim_writelog("\n\n", 2); splx(opil); ! HALT(-1); } --- 200,206 ---- sim_writelog("\n\n", 2); splx(opil); ! abort(-1); } Index: lamix/syscall/simtraps_asm.S =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/lamix/syscall/simtraps_asm.S,v retrieving revision 1.3 retrieving revision 1.4 diff --context -r1.3 -r1.4 *** lamix/syscall/simtraps_asm.S 2002/10/25 20:24:57 1.3 --- lamix/syscall/simtraps_asm.S 2003/05/22 21:55:18 1.4 *************** *** 61,68 **** !------------------------------------------------------------------------------ ! .global halt ! halt: membar #MemIssue ! this trap actually kills execution, so you better not have any stores left! ld [%sp],%g0 --- 61,68 ---- !------------------------------------------------------------------------------ ! .global terminate ! terminate: membar #MemIssue ! this trap actually kills execution, so you better not have any stores left! ld [%sp],%g0 *************** *** 117,127 **** nop !------------------------------------------------------------------------------ - .global HALT .global abort .global _abort .global __abort - HALT: abort: _abort: __abort: --- 117,125 ---- Index: src/Caches/l1d_cache.c =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/src/Caches/l1d_cache.c,v retrieving revision 1.4 retrieving revision 1.5 diff --context -r1.4 -r1.5 *** src/Caches/l1d_cache.c 2003/03/19 19:06:20 1.4 --- src/Caches/l1d_cache.c 2003/05/22 21:55:20 1.5 *************** *** 134,140 **** */ while (req = lqueue_head(&captr->request_queue)) { ! if ((IsSysControl_local(req)) && (req->prcr_req_type == READ)) { if (SysControl_local_request(gid, req)) { --- 134,140 ---- */ while (req = lqueue_head(&captr->request_queue)) { ! if (IsSysControl_local(req)) { if (SysControl_local_request(gid, req)) { Index: src/Caches/syscontrol.c =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/src/Caches/syscontrol.c,v retrieving revision 1.4 retrieving revision 1.5 diff --context -r1.4 -r1.5 *** src/Caches/syscontrol.c 2002/10/25 20:25:08 1.4 --- src/Caches/syscontrol.c 2003/05/22 21:55:21 1.5 *************** *** 183,193 **** unsigned old_addr; if ((req->type != REQUEST) || ! (req->prcr_req_type != READ)) YS__errmsg(req->node, "Unknown req->type %i or req->prcr_req_type %i at SysControl module\n", req->type, req->prcr_req_type); lqueue_remove(&(syscontrol_ptr->above->request_queue)); FreeAMemUnit(req->d.proc_data.proc_id, req->d.proc_data.inst_tag); --- 183,198 ---- unsigned old_addr; if ((req->type != REQUEST) || ! ((req->prcr_req_type != READ) && (req->prcr_req_type != WRITE))) YS__errmsg(req->node, "Unknown req->type %i or req->prcr_req_type %i at SysControl module\n", req->type, req->prcr_req_type); + if ((req->prcr_req_type == WRITE) && + (req->paddr - SYSCONTROL_THIS_LOW(gid % ARCH_cpus) < SC_RDONLY_HIGH)) + YS__errmsg(req->node, + "Attempted write to read-only memory in SysControl module"); + lqueue_remove(&(syscontrol_ptr->above->request_queue)); FreeAMemUnit(req->d.proc_data.proc_id, req->d.proc_data.inst_tag); *************** *** 197,203 **** PerformData(req); MemDoneHeapInsert(req, IOHIT); ! req->paddr = old_addr; ReplaceAddr(req->d.proc_data.inst, req->paddr); --- 202,218 ---- PerformData(req); MemDoneHeapInsert(req, IOHIT); ! ! if ((req->paddr == SYSCONTROL_THIS_LOW(gid%ARCH_cpus) + SC_HALT) && ! (req->prcr_req_type == WRITE)) ! ProcessorHalt(gid, read_int(req->node, req->paddr)); ! req->paddr = old_addr; ReplaceAddr(req->d.proc_data.inst, req->paddr); Index: src/Processor/active.cc =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/src/Processor/active.cc,v retrieving revision 1.6 retrieving revision 1.7 diff --context -r1.6 -r1.7 *** src/Processor/active.cc 2003/01/22 20:45:04 1.6 --- src/Processor/active.cc 2003/05/22 21:55:24 1.7 *************** *** 265,278 **** instance *tmpinst; int gradded = 0, busy = 0; ! ! if (!PSTATE_GET_PRIV(proc->pstate)) ! proc->cycles[OK]++; ! ! ptr = q->PeekHead(); - if ((ptr == NULL) || ((!ptr->done) && (!ptr->exception)) || (ptr->cycledone + simulate_ilp > cycle)) --- 265,273 ---- instance *tmpinst; int gradded = 0, busy = 0; ! ptr = q->PeekHead(); if ((ptr == NULL) || ((!ptr->done) && (!ptr->exception)) || (ptr->cycledone + simulate_ilp > cycle)) *************** *** 604,613 **** if ((PSTATE_GET_DTE(proc->pstate)) && (tmpinst->unit_type == uMEM)) proc->mem_refs++; - - if (!PSTATE_GET_PRIV(proc->pstate)) - proc->graduated[OK]++; - GraduateTagConverter(ptr->tag, proc); --- 599,604 ---- Index: src/Processor/except.cc =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/src/Processor/except.cc,v retrieving revision 1.6 retrieving revision 1.7 diff --context -r1.6 -r1.7 *** src/Processor/except.cc 2003/01/22 20:45:05 1.6 --- src/Processor/except.cc 2003/05/22 21:55:24 1.7 *************** *** 474,486 **** proc->pc = icopy.npc; // don't restart the instruction separately proc->npc = proc->pc + SIZE_OF_SPARC_INSTRUCTION; } ! // statistics: add cycle count and instruction count proc->cycles[SERIALIZE] += (long long)YS__Simtime + proc->DELAY - proc->start_cycle[SERIALIZE]; proc->graduated[SERIALIZE] += proc->graduates - proc->start_graduated[SERIALIZE]; ! break; --- 474,493 ---- proc->pc = icopy.npc; // don't restart the instruction separately proc->npc = proc->pc + SIZE_OF_SPARC_INSTRUCTION; } ! // statistics: add cycle count and instruction count proc->cycles[SERIALIZE] += (long long)YS__Simtime + proc->DELAY - proc->start_cycle[SERIALIZE]; proc->graduated[SERIALIZE] += proc->graduates - proc->start_graduated[SERIALIZE]; ! proc->start_graduated[SERIALIZE] = 0; ! ! if (!PSTATE_GET_PRIV(proc->pstate)) ! { ! proc->start_graduated[OK] = proc->graduates; ! proc->start_cycle[OK] = proc->curr_cycle; ! } ! return(0); break; *************** *** 501,511 **** --- 508,525 ---- (long long)YS__Simtime + proc->DELAY - proc->start_cycle[SOFT_LIMBO]; proc->graduated[SOFT_LIMBO] += proc->graduates - proc->start_graduated[SOFT_LIMBO]; + proc->start_graduated[SOFT_LIMBO] = 0; proc->reset_lists(); proc->pc = icopy.pc; // we need to restart the instruction proc->npc = icopy.npc; + if (!PSTATE_GET_PRIV(proc->pstate)) + { + proc->start_graduated[OK] = proc->graduates; + proc->start_cycle[OK] = proc->curr_cycle; + } + return(0); break; *************** *** 533,541 **** (long long)YS__Simtime + proc->DELAY - proc->start_cycle[SYSTRAP_02]; proc->graduated[SYSTRAP_02] += proc->graduates - proc->start_graduated[SYSTRAP_02]; return 0; ! // ---------------------------------------------------------------------- --- 547,562 ---- (long long)YS__Simtime + proc->DELAY - proc->start_cycle[SYSTRAP_02]; proc->graduated[SYSTRAP_02] += proc->graduates - proc->start_graduated[SYSTRAP_02]; + proc->start_graduated[SYSTRAP_02] = 0; + if (!PSTATE_GET_PRIV(proc->pstate)) + { + proc->start_graduated[OK] = proc->graduates; + proc->start_cycle[OK] = proc->curr_cycle; + } + return 0; ! break; // ---------------------------------------------------------------------- *************** *** 634,702 **** case FPERR: take_fp_exception(proc, inst); break; - - - //----------------------------------------------------------------------- - case ILLEGAL: - case PRIVILEGED: ! case CLEANWINDOW: ! case WINOVERFLOW: ! case WINUNDERFLOW: ! ! case FPDISABLED: ! case DIV0: ! ! case SYSTRAP_00: ! case SYSTRAP_01: ! case SYSTRAP_03: ! case SYSTRAP_04: ! case SYSTRAP_05: ! case SYSTRAP_06: ! case SYSTRAP_07: ! case SYSTRAP_08: ! case SYSTRAP_09: ! case SYSTRAP_0A: ! case SYSTRAP_0B: ! case SYSTRAP_0C: ! case SYSTRAP_0D: ! case SYSTRAP_0E: ! case SYSTRAP_0F: ! case SYSTRAP_10: ! case SYSTRAP_11: ! case SYSTRAP_12: ! case SYSTRAP_13: ! case SYSTRAP_14: ! case SYSTRAP_15: ! case SYSTRAP_16: ! case SYSTRAP_17: ! case SYSTRAP_18: ! case SYSTRAP_19: ! case SYSTRAP_1A: ! case SYSTRAP_1B: ! case SYSTRAP_1C: ! case SYSTRAP_1D: ! case SYSTRAP_1E: ! case SYSTRAP_1F: ! case SYSTRAP_20: ! case SYSTRAP_21: ! case SYSTRAP_22: ! case SYSTRAP_23: ! case SYSTRAP_24: ! case SYSTRAP_25: ! case SYSTRAP_26: ! case SYSTRAP_27: ! case SYSTRAP_28: ! case SYSTRAP_29: ! case SYSTRAP_2A: ! case SYSTRAP_2B: ! case SYSTRAP_2C: ! case SYSTRAP_2D: ! case SYSTRAP_2E: ! case SYSTRAP_2F: ! break; ! ! // external interrupt: clear interrupt bit case INTERRUPT_00: case INTERRUPT_01: case INTERRUPT_02: --- 655,662 ---- case FPERR: take_fp_exception(proc, inst); break; ! // external interrupt: clear interrupt bit ------------------------------ case INTERRUPT_00: case INTERRUPT_01: case INTERRUPT_02: *************** *** 716,884 **** proc->interrupt_pending &= ~(0x00000001 << (INTERRUPT_00 - icopy.exception_code)); break; - - default: - YS__logmsg(proc->proc_id / ARCH_cpus, - "Default case in except.cc (%i)\n", - icopy.exception_code); - exit(-1); } - ! // ---------------------------------------------------------------------- ! switch (icopy.exception_code) ! { ! ! case ITLB_MISS: ! case DTLB_MISS: ! case INSTR_FAULT: ! case DATA_FAULT: ! ! case BUSERR: ! case ILLEGAL: ! case PRIVILEGED: ! case CLEANWINDOW: ! case WINOVERFLOW: ! case WINUNDERFLOW: ! ! case FPDISABLED: ! case FPERR: ! case DIV0: ! ! case SYSTRAP_00: ! case SYSTRAP_01: ! case SYSTRAP_02: ! case SYSTRAP_03: ! case SYSTRAP_04: ! case SYSTRAP_05: ! case SYSTRAP_06: ! case SYSTRAP_07: ! case SYSTRAP_08: ! case SYSTRAP_09: ! case SYSTRAP_0A: ! case SYSTRAP_0B: ! case SYSTRAP_0C: ! case SYSTRAP_0D: ! case SYSTRAP_0E: ! case SYSTRAP_0F: ! case SYSTRAP_10: ! case SYSTRAP_11: ! case SYSTRAP_12: ! case SYSTRAP_13: ! case SYSTRAP_14: ! case SYSTRAP_15: ! case SYSTRAP_16: ! case SYSTRAP_17: ! case SYSTRAP_18: ! case SYSTRAP_19: ! case SYSTRAP_1A: ! case SYSTRAP_1B: ! case SYSTRAP_1C: ! case SYSTRAP_1D: ! case SYSTRAP_1E: ! case SYSTRAP_1F: ! case SYSTRAP_20: ! case SYSTRAP_21: ! case SYSTRAP_22: ! case SYSTRAP_23: ! case SYSTRAP_24: ! case SYSTRAP_25: ! case SYSTRAP_26: ! case SYSTRAP_27: ! case SYSTRAP_28: ! case SYSTRAP_29: ! case SYSTRAP_2A: ! case SYSTRAP_2B: ! case SYSTRAP_2C: ! case SYSTRAP_2D: ! case SYSTRAP_2E: ! case SYSTRAP_2F: ! ! case INTERRUPT_00: ! case INTERRUPT_01: ! case INTERRUPT_02: ! case INTERRUPT_03: ! case INTERRUPT_04: ! case INTERRUPT_05: ! case INTERRUPT_06: ! case INTERRUPT_07: ! case INTERRUPT_08: ! case INTERRUPT_09: ! case INTERRUPT_0A: ! case INTERRUPT_0B: ! case INTERRUPT_0C: ! case INTERRUPT_0D: ! case INTERRUPT_0E: ! case INTERRUPT_0F: ! ! proc->reset_lists(); ! SaveCPUState(&icopy, proc); ! if (icopy.exception_code == CLEANWINDOW) ! { #ifdef TRACE ! if (YS__Simtime > TRACE) ! YS__logmsg(proc->proc_id / ARCH_cpus, ! " [%i] Clean Window %i - saving %i\n", ! proc->proc_id, proc->cwp, (proc->cwp + 1) % NUM_WINS); #endif ! proc->cwp = (proc->cwp + 1) % NUM_WINS; ! } ! if ((icopy.code.instruction == iFLUSHW) && ! (icopy.exception_code == WINOVERFLOW)) ! { #ifdef TRACE ! if (YS__Simtime > TRACE) ! YS__logmsg(proc->proc_id / ARCH_cpus, ! " [%i] Flush Window - saving %i\n", ! proc->proc_id, (proc->cwp + proc->cansave + 2) % NUM_WINS); #endif ! proc->cwp = (proc->cwp + proc->cansave + 2) % NUM_WINS; ! } ! if ((icopy.code.instruction == iSAVE) && ! (icopy.exception_code == WINOVERFLOW)) ! { #ifdef TRACE ! if (YS__Simtime > TRACE) ! YS__logmsg(proc->proc_id / ARCH_cpus, ! " [%i] Overflow Window %i - saving %i\n", ! proc->proc_id, proc->cwp, (proc->cwp + 2) % NUM_WINS); #endif ! proc->cwp = (proc->cwp + 2) % NUM_WINS; ! } ! ! ! if (icopy.exception_code == WINUNDERFLOW) ! { #ifdef TRACE ! if (YS__Simtime > TRACE) ! YS__logmsg(proc->proc_id / ARCH_cpus, ! " [%i] Underflow Window %i - restoring %i\n", ! proc->proc_id, proc->cwp, (proc->cwp + NUM_WINS -1) % NUM_WINS); #endif ! proc->cwp = (proc->cwp + NUM_WINS - 1) % NUM_WINS; ! } ! //----------------------------------------------------------------------- ! // jump to trap table ! proc->pc = proc->phy_int_reg_file[proc->intmapper[arch_to_log(proc, ! proc->cwp, ! PRIV_TBA)]] | ! icopy.exception_code << 5; ! proc->npc = proc->pc+SIZE_OF_SPARC_INSTRUCTION; ! } ! return 0; } --- 676,751 ---- proc->interrupt_pending &= ~(0x00000001 << (INTERRUPT_00 - icopy.exception_code)); break; } ! proc->reset_lists(); ! SaveCPUState(&icopy, proc); ! if (icopy.exception_code == CLEANWINDOW) ! { #ifdef TRACE ! if (YS__Simtime > TRACE) ! YS__logmsg(proc->proc_id / ARCH_cpus, ! " [%i] Clean Window %i - saving %i\n", ! proc->proc_id, proc->cwp, (proc->cwp + 1) % NUM_WINS); #endif ! proc->cwp = (proc->cwp + 1) % NUM_WINS; ! } ! if ((icopy.code.instruction == iFLUSHW) && ! (icopy.exception_code == WINOVERFLOW)) ! { #ifdef TRACE ! if (YS__Simtime > TRACE) ! YS__logmsg(proc->proc_id / ARCH_cpus, ! " [%i] Flush Window - saving %i\n", ! proc->proc_id, (proc->cwp + proc->cansave + 2) % NUM_WINS); #endif ! proc->cwp = (proc->cwp + proc->cansave + 2) % NUM_WINS; ! } ! if ((icopy.code.instruction == iSAVE) && ! (icopy.exception_code == WINOVERFLOW)) ! { #ifdef TRACE ! if (YS__Simtime > TRACE) ! YS__logmsg(proc->proc_id / ARCH_cpus, ! " [%i] Overflow Window %i - saving %i\n", ! proc->proc_id, proc->cwp, (proc->cwp + 2) % NUM_WINS); #endif ! proc->cwp = (proc->cwp + 2) % NUM_WINS; ! } ! ! if (icopy.exception_code == WINUNDERFLOW) ! { #ifdef TRACE ! if (YS__Simtime > TRACE) ! YS__logmsg(proc->proc_id / ARCH_cpus, ! " [%i] Underflow Window %i - restoring %i\n", ! proc->proc_id, proc->cwp, (proc->cwp + NUM_WINS -1) % NUM_WINS); #endif ! proc->cwp = (proc->cwp + NUM_WINS - 1) % NUM_WINS; ! } ! //--------------------------------------------------------------------------- ! // jump to trap table ! if ((icopy.exception_code <= OK) || (icopy.exception_code >= MAX_EXCEPT)) ! YS__errmsg(proc->proc_id / ARCH_cpus, ! "Invalid exception code %i at PC 0x%08X\n", ! icopy.exception_code, icopy.pc); ! ! proc->pc = proc->phy_int_reg_file[proc->intmapper[arch_to_log(proc, ! proc->cwp, ! PRIV_TBA)]] | ! icopy.exception_code << 5; ! proc->npc = proc->pc+SIZE_OF_SPARC_INSTRUCTION; ! return 0; } *************** *** 1503,1536 **** //----------------------------------------------------------------------- case iDONERETRY: { // statistics: add cycle count and instruction count ! proc->cycles[proc-> ! phy_int_reg_file[proc->intmapper[arch_to_log(proc, ! proc->cwp, ! PRIV_TT)]]] += ! (long long)YS__Simtime + proc->DELAY - ! proc->start_cycle[proc-> ! phy_int_reg_file[proc->intmapper[arch_to_log(proc, ! proc->cwp, ! PRIV_TT)]]]; ! ! proc->graduated[proc-> ! phy_int_reg_file[proc->intmapper[arch_to_log(proc, ! proc->cwp, ! PRIV_TT)]]] += ! proc->graduates - ! proc->start_graduated[proc-> ! phy_int_reg_file[proc->intmapper[arch_to_log(proc, ! proc->cwp, ! PRIV_TT)]]]; ! //--------------------------------------------------------------------- // return from trap state --- 1370,1390 ---- //----------------------------------------------------------------------- case iDONERETRY: { + int tt = proc->phy_int_reg_file[proc->intmapper[arch_to_log(proc, + proc->cwp, + PRIV_TT)]]; // statistics: add cycle count and instruction count ! proc->cycles[tt] += (long long)YS__Simtime + proc->DELAY - ! proc->start_cycle[tt]; ! ! proc->graduated[tt] += proc->graduates - proc->start_graduated[tt]; ! proc->start_graduated[tt] = 0; ! //--------------------------------------------------------------------- // return from trap state *************** *** 1592,1597 **** --- 1446,1458 ---- proc->tl, inst->pc); + if (!PSTATE_GET_PRIV(proc->pstate)) + { + proc->start_graduated[OK] = proc->graduates; + proc->start_cycle[OK] = proc->curr_cycle; + } + + #ifdef TRACE if (YS__Simtime > TRACE) { Index: src/Processor/exec.hh =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/src/Processor/exec.hh,v retrieving revision 1.5 retrieving revision 1.6 diff --context -r1.5 -r1.6 *** src/Processor/exec.hh 2003/04/15 15:20:35 1.5 --- src/Processor/exec.hh 2003/05/22 21:55:24 1.6 *************** *** 152,157 **** --- 152,164 ---- proc->start_cycle[rettagval->exception_code] = (long long)YS__Simtime; proc->start_graduated[rettagval->exception_code] = proc->graduates; + if (!PSTATE_GET_PRIV(proc->pstate)) + { + proc->cycles[OK] += (long long)YS__Simtime - proc->start_cycle[OK]; + proc->graduated[OK] += proc->graduates - proc->start_graduated[OK]; + proc->start_graduated[OK] = 0; + } + proc->time_pre_exception = proc->curr_cycle; PreExceptionHandler(rettagval, proc); } Index: src/Processor/mainsim.cc =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/src/Processor/mainsim.cc,v retrieving revision 1.11 retrieving revision 1.13 diff --context -r1.11 -r1.13 *** src/Processor/mainsim.cc 2003/04/15 15:20:35 1.11 --- src/Processor/mainsim.cc 2003/05/22 21:55:24 1.13 *************** *** 550,555 **** --- 550,557 ---- "Opening statfile %s failed: %s\n", fn, YS__strerror(errno)); } + + free(fn); } *************** *** 566,572 **** YS__logmsg(k, "%s ", argv[ac]); YS__logmsg(k, "\n"); ! YS__logmsg(k, "\nRunning simulation on %s (%s/%s)\n\n", s_uname.nodename, s_uname.sysname, s_uname.machine); YS__statmsg(k, "RSIM command line: "); --- 568,574 ---- YS__logmsg(k, "%s ", argv[ac]); YS__logmsg(k, "\n"); ! YS__logmsg(k, "\nRunning simulation on %s (%s/%s)\n", s_uname.nodename, s_uname.sysname, s_uname.machine); YS__statmsg(k, "RSIM command line: "); *************** *** 620,629 **** for (int n = 1; n < ARCH_cpus; n++) { ! AllProcs[i + n] = new ProcState(i); AllProcs[i + n]->pc = AllProcs[i]->pc; AllProcs[i + n]->npc = AllProcs[i]->npc; AllProcs[i + n]->fetch_pc = AllProcs[i]->fetch_pc; } } --- 622,635 ---- for (int n = 1; n < ARCH_cpus; n++) { ! AllProcs[i + n] = new ProcState(i + n); AllProcs[i + n]->pc = AllProcs[i]->pc; AllProcs[i + n]->npc = AllProcs[i]->npc; AllProcs[i + n]->fetch_pc = AllProcs[i]->fetch_pc; + AllProcs[i + n]->kdata_segment_low = AllProcs[i]->kdata_segment_low; + AllProcs[i + n]->kdata_segment_high = AllProcs[i]->kdata_segment_high; + AllProcs[i + n]->ktext_segment_low = AllProcs[i]->ktext_segment_low; + AllProcs[i + n]->ktext_segment_high = AllProcs[i]->ktext_segment_high; } } *************** *** 746,752 **** //--------------------------------------------------------------------- ProcState *proc = AllProcs[i]; ! if (proc) { proc->curr_cycle = (long long) YS__Simtime; #ifdef COREFILE --- 752,758 ---- //--------------------------------------------------------------------- ProcState *proc = AllProcs[i]; ! if ((proc) && (!proc->halt)) { proc->curr_cycle = (long long) YS__Simtime; #ifdef COREFILE Index: src/Processor/memprocess.cc =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/src/Processor/memprocess.cc,v retrieving revision 1.5 retrieving revision 1.6 diff --context -r1.5 -r1.6 *** src/Processor/memprocess.cc 2002/10/25 20:25:17 1.5 --- src/Processor/memprocess.cc 2003/05/22 21:55:24 1.6 *************** *** 467,475 **** } ! extern "C" void ExternalInterrupt(int num, int type) { ! if (AllProcs[num] != NULL) ! AllProcs[num]->ExtInterrupt(type); } --- 467,525 ---- } + /*****************************************************************************/ + /* Signal I/O interrupt to processor: set pending interrupt bit and clear */ + /* halt-flag. Also, subtract the halted time from the cycle count for the */ + /* current exception level, and add halted time to total time CPU was halted.*/ + /*****************************************************************************/ ! extern "C" void ExternalInterrupt(int proc_id, int int_num) { ! ProcState *proc = AllProcs[proc_id]; ! int n; ! long long halted; ! ! if (proc == NULL) ! return; ! ! if (int_num < 0 || int_num > 15) ! YS__errmsg(proc_id / ARCH_cpus, "Invalid Interrupt Type %i\n", int_num); ! ! proc->interrupt_pending |= 0x00000001 << int_num; ! YS__logmsg(proc_id / ARCH_cpus, ! "%.0f Interrupt %i CPU %i\n", ! YS__Simtime, int_num, proc_id % ARCH_cpus); ! ! if (proc->halt != 0) ! { ! halted = (long long)YS__Simtime - proc->start_halted; ! for (n = 0; n < MAX_EXCEPT; n++) ! if (proc->start_graduated[n] != 0) ! proc->start_cycle[n] += halted; ! ! proc->total_halted += halted; ! proc->halt = 0; ! } ! } ! ! ! /*****************************************************************************/ ! /* Halt processor: set PIL to specified value and set halt-flag. */ ! /* Remember current cycle for acconting. */ ! /*****************************************************************************/ ! ! extern "C" void ProcessorHalt(int proc_id, int pil) ! { ! ProcState *proc = AllProcs[proc_id]; ! ! if (proc == NULL) ! return; ! ! proc->halt = 1; ! proc->start_halted = (long long)YS__Simtime; ! ! proc->pil = pil; ! proc->log_int_reg_file[arch_to_log(proc, proc->cwp, PRIV_PIL)] = ! proc->phy_int_reg_file[proc->intmapper[arch_to_log(proc, proc->cwp, ! PRIV_PIL)]] = pil; } Index: src/Processor/memunit.h =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/src/Processor/memunit.h,v retrieving revision 1.2 retrieving revision 1.3 diff --context -r1.2 -r1.3 *** src/Processor/memunit.h 2002/10/25 20:25:17 1.2 --- src/Processor/memunit.h 2003/05/22 21:55:24 1.3 *************** *** 128,133 **** --- 128,134 ---- void ReplaceAddr (struct instance *inst, unsigned addr); void ExternalInterrupt (int, int); + void ProcessorHalt (int, int); #ifdef __cplusplus } Index: src/Processor/procstate.cc =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/src/Processor/procstate.cc,v retrieving revision 1.5 retrieving revision 1.6 diff --context -r1.5 -r1.6 *** src/Processor/procstate.cc 2003/01/22 20:45:05 1.5 --- src/Processor/procstate.cc 2003/05/22 21:55:24 1.6 *************** *** 140,146 **** proc_id = proc; aliveprocs++; ! #ifdef COREFILE char proc_file_name[80]; sprintf(proc_file_name, "corefile.%d", proc_id); --- 140,147 ---- proc_id = proc; aliveprocs++; ! halt = 0; ! #ifdef COREFILE char proc_file_name[80]; sprintf(proc_file_name, "corefile.%d", proc_id); *************** *** 437,443 **** start_cycle[n] = 0; start_graduated[n] = 0; } ! mem_refs = 0; sim_start_time = time(NULL); --- 438,445 ---- start_cycle[n] = 0; start_graduated[n] = 0; } ! ! total_halted = 0; mem_refs = 0; sim_start_time = time(NULL); *************** *** 716,730 **** PrintTime((curr_cycle - start_time) * (double)CPU_CLK_PERIOD / 1.0e12, statfile[nid]); YS__statmsg(nid, "\n"); YS__statmsg(nid, ! "Instructions decoded: %12lld Decode IPC: %8.2f\n", instruction_count - start_icount, (float)(instruction_count - start_icount) / ! (float)(curr_cycle - start_time)); YS__statmsg(nid, ! "Instructions graduated: %12lld Graduate IPC: %8.2f\n", graduates, ! (float)(graduates) / (float)(curr_cycle - start_time)); --- 718,737 ---- PrintTime((curr_cycle - start_time) * (double)CPU_CLK_PERIOD / 1.0e12, statfile[nid]); YS__statmsg(nid, "\n"); + YS__statmsg(nid, + "Non-halted cycles: %12lld CPU Utilization: %8.2lf %%\n", + curr_cycle - start_time - total_halted, + 100.0 * (double)(curr_cycle - start_time - total_halted) / + (double)(curr_cycle - start_time)); YS__statmsg(nid, ! "Instructions decoded: %12lld Decode IPC: %8.2f\n", instruction_count - start_icount, (float)(instruction_count - start_icount) / ! (float)(curr_cycle - start_time - total_halted)); YS__statmsg(nid, ! "Instructions graduated: %12lld Graduate IPC: %8.2f\n", graduates, ! (float)(graduates) / (float)(curr_cycle - start_time - total_halted)); *************** *** 763,769 **** } ! YS__statmsg(nid, "\n------------------------------------------------------------------------\n"); YS__statmsg(nid, "TLB STATISTICS\n\n"); --- 770,776 ---- } ! YS__statmsg(nid, "\n------------------------------------------------------------------------\n"); YS__statmsg(nid, "TLB STATISTICS\n\n"); *************** *** 1244,1255 **** exceptions[n] = 0; graduated[n] = 0; cycles[n] = 0; ! start_cycle[n] = 0; start_graduated[n] = 0; } ! start_cycle[SYSTRAP_02] = curr_cycle; ! mem_refs = 0; ldissues = ldspecs = limbos = unlimbos = redos = 0; --- 1251,1261 ---- exceptions[n] = 0; graduated[n] = 0; cycles[n] = 0; ! start_cycle[n] = curr_cycle; start_graduated[n] = 0; } ! total_halted = 0; mem_refs = 0; ldissues = ldspecs = limbos = unlimbos = redos = 0; *************** *** 1320,1325 **** --- 1326,1332 ---- for (i = 0; i < int (eNUM_EFF_STALLS); i++) eff_losses[i] = 0; } + Index: src/Processor/procstate.h =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/src/Processor/procstate.h,v retrieving revision 1.6 retrieving revision 1.7 diff --context -r1.6 -r1.7 *** src/Processor/procstate.h 2002/10/25 20:25:18 1.6 --- src/Processor/procstate.h 2003/05/22 21:55:24 1.7 *************** *** 268,273 **** --- 268,275 ---- /******** instruction fetching, decoding, and graduation *******/ + int halt; /* halt processor until next interrupt */ + unsigned pc; /* the current pc */ unsigned npc; /* the next pc to fetch from */ *************** *** 432,437 **** --- 434,441 ---- /* handler */ long long start_graduated[MAX_EXCEPT]; /* entry instruction count */ + long long start_halted; /* start of last halt period */ + long long total_halted; /* total time processor is halted */ long long mem_refs; /* number of memory references */ long long bpb_good_predicts; /* number of correct predictions */ *************** *** 513,528 **** inline unsigned RASPredict (); // remove on a RETURN, this is a destructive prediction - inline void ExtInterrupt(int num) - { - if (num < 0 || num > 15) - YS__errmsg(proc_id / ARCH_cpus, "Invalid Interrupt Type %i\n", num); - - interrupt_pending |= 0x00000001 << num; - YS__logmsg(proc_id / ARCH_cpus, - "%.0f Interrupt %i CPU %i\n", - YS__Simtime, num, proc_id % ARCH_cpus); - } /* Statistics */ void report_stats (int); --- 517,522 ---- Index: src/Processor/signalhandler.cc =================================================================== RCS file: /res/impulse/users/map/cvsroot/ml-rsim/src/Processor/signalhandler.cc,v retrieving revision 1.2 retrieving revision 1.3 diff --context -r1.2 -r1.3 *** src/Processor/signalhandler.cc 2002/10/31 19:50:45 1.2 --- src/Processor/signalhandler.cc 2003/05/22 21:55:24 1.3 *************** *** 70,75 **** --- 70,76 ---- } #include "Processor/procstate.h" + #include "Processor/memunit.h" #include "Processor/simio.h" #include "Processor/fsr.h" *************** *** 153,159 **** for (n = ARCH_cpus * ARCH_firstnode; n < ARCH_cpus * (ARCH_firstnode + ARCH_mynodes); n += ARCH_cpus) ! AllProcs[n]->ExtInterrupt(IPL_PFAIL); } --- 154,160 ---- for (n = ARCH_cpus * ARCH_firstnode; n < ARCH_cpus * (ARCH_firstnode + ARCH_mynodes); n += ARCH_cpus) ! ExternalInterrupt(n, IPL_PFAIL); }