CoGenE: Compilation-architectural Generation-Exploration for Automation of DSAs:

My dissertation presents a design automation framework for programmable accelerators. The framework significantly reduces design time and cost by providing an optimizing compiler and a feasible set of architectures  for an input application domain.  We preserve programmability by providing retargetable compilation. A cycle-accurate architectural simulator estimates performance and energy dissipation, two critical system quality metrics.  Application characterization is reduced or removed by automatic design space exploration. More information can found on the technical report.
Details on the architecture and the optimizing compiler can be found here.

I have also worked towards in the following areas and the pages can be found here: power aware design of GPUs, heterogeneous interconnects for multi-core architectures, and MAC protocols for communication systems.