Design of Power Aware Graphics Processing Units (GPUs):
The tremendous increase in the complexity (memory and computations) of
graphics models have been supported by a similar increase in the
computational resources available in graphics processing units (GPUs).
The inherently high parallelism of such systems has led to a
significant increase in power dissipation, thereby necessitating
expensive cooling solutions. In addition, general purpose processing on
such specialized architectures poses new problems yet opens avenues for
power optimizations at the architectural level. This work, done
in colloboration with ATI research, presents a
power modeling framework for GPUs.
Design Space Exploration for GPU Interconnects:
Studies based on our framework show that simple bus
encoding reduces the power of a medium/high activity texture
cache global bus interconnect by 15-30\% while exploring the
trade-offs between power savings, data activity, and interconnect
length. We also showcase the power benefits (around 13\%) of optimally
sizing repeaters and spacing between them on the same global bus.