Gi-Ho Park's Home Page

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Education
Career
Research Interests
Publications
Patents
Favorite Web Sites
Personal Data

Education

Ph.D., Dept. of Computer Science, Yonsei Univ., Feb. 2000

M.S., Dept. of Computer Science, Yonsei Univ., Feb. 1995

B.S., Dept. of Computer Science, Yonsei Univ., Feb. 1993

Career

Post-Doc. Research Associate: School of Computing, Univ. of Utah, June 2000 - present

Mar. 1995 - Aug. 1997: Instructor, Dept. Computer Science, Yonsei Univ.

Research Interests

Low-Power Issues in Memory Hierarchy Design

Memory System Architecture with Processor-Memory Integration

Application Specific Embedded Memory (ASEM)

Memory Management Unit / Cache Controller Design for Embedded CPU

Memory Hierarchy in Future High Performance System

Instruction/Data Prefetching

Publications

International Journals

Gi-Ho Park, Kil-Whan Lee, Jae-Hyuk Lee, Tack-Don Han, Shin-Dug Kim, ``A Power Efficient Cache Structure for Embedded Processors Based on the Dual Cache Structure,'' Lecture Notes in Computer Science, Vol. 1985, Mar. 2001.
Jung-Hoon Lee, Jang-Soo Lee, Gi-Ho Park, Kil-Whan Lee, Shin-Dug Kim, ``Dual TLB structure to support two page sizes,'' Electronic Letter, Vol. 36, No. 8, Apr. 2000, pp. 705-706.
Gi-Ho Park, Oh-Young Kwon, Tack-Don Han, Shin-Dug Kim, and Sung-Bong Yang, ``Methods to Improve Performance of Instruction Prefetching through Balanced Improvment of Primary Two Performance Factors,'' Journal of System Architecture, Vol. 44, June 1998, pp. 755 - 772.
Gi-Ho Park, Oh-Young Kwon, Tack-Don Han, and Shin-Dug Kim, ``Non-referenced Prefetch (NRP) Cache for Instruction Prefetching,'' IEE Computers and Digital Techniques, Vol. 143, No. 1, January 1996. pp. 37-43.

International Conferences

Kil-Whan Lee, Jang-Soo Lee, Gi-Ho Park, Jung-Hoon Lee, Tack-Don Han, Shin-Dug Kim, Yong-Chun Kim, Seh-Woong Jung, Kwang-Yup Lee, ``The Cache Memory System for CalmRISC 32,'' AP-ASIC '2000, Aug. 2000.
Gi-Ho Park, Kil-Whan Lee, Jang-Soo Lee, Tack-Don Han, Shin-Dug Kim, Yong-Chun Kim, Seh-Woong Jeong, Kwang-Yup Lee, ``A Low-Power Cache System for Embedded Processors,'' IEEE 43rd Midwest Symposium on Circuits and Systems, Aug. 2000.
Gi-Ho Park, Kil-Whan Lee, Tack-Don Han, Shin-Dug Kim, ``A Dual Data Cache System to Reflect the Principle of Locality Effectively,'' International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA '2000), June 2000.
Gi-Ho Park, Kil-Whan Lee, Tack-Don Han, Shin-Dug Kim, ``A Power-Efficient Cache Structure for Embedded Processors Based on the Dual Cache Structure,'' ACM SIGPLAN 2000 Workshop on Language, Compilers, and Tools for Embedded Systems (LCTES '2000), June 2000, pp. 85 - 94.
Chun-Ja Choi, Gi-Ho Park, Jae-Hyuk Lee, Woo-Chan Park, Tack-Don Han, ``Performance Comparison of Various Cache Systems for Texture Mapping,'' HPC-Asia '2000, May 2000.
Gi-Ho Park, Kil-Whan Lee, Jang-Soo Lee, Jung-Hoon Lee, Tack-Don Han, Shin-Dug Kim, Yong-Chun Kim, Seh-Woong Jung, Kwang-Yup Lee, ``Cooperative Cache System: A Low-Power Cache Structure for Embedded Processors,'' International Symposium on Low-Power and High-Speed Chips (COOL Chips III), Apr. 2000, pp.189-199.
Gi-Ho Park, Tack-Don Han, Shin-Dug Kim, ``Analyzing Instruction Prefetching Techniques via a Cache Performance Model: Effectiveness and Limitations,'' 19th IEEE International Performance, Computing and Communications, pp. 501-508, Feb. 2000.
Kil-Whan Lee, Gi-Ho Park, Tack-don Han, Shin-Dug Kim, " An Effective Selection Mechanism to Exploit Spatial Locality in Dual Data Cache," International Conference on Computers, Communications and Systems' 98, pp. 31-37, Nov. 1998
Gi-Ho Park, Oh-Young Kwon, Tack-Don Han, Shin-Dug Kim, and Sung-Bong Yang, ``An Improved Lookahead Instruction Prefetching,'' Proc. High Performance Computing Asia '97, pp. 712 - 715, April 1997.
Hyung-Min Youn, Gi-Ho Park, Kil-Whan Lee, Tack-Don Han, Shin-Dug Kim, and Sung-Bong Yang, ``Reconfigurable Address Collector and Flying Simulator,'' Proc. High Performance Computing Asia '97, pp. 552 - 556, April 1997.
Oh-Young Kwon, Gi-Ho Park, Tack-Don Han, Shin-Dug Kim, and Sung-Bong Yang, ``CtrlTile: A Loop Tiling to Reduce Loop Control Overhead,'' 15th IASTED Int'l Conf. Applied Informatics, pp. 13 - 16, February 1997.

Domestic Journals

Hyung-Min Youn, Gi-Ho Park, Kil-Whan Lee, Tack-Don Han, Shin-Dug Kim, and Sung-Bong Yang, Yong-Surk Lee, ``Development of Hardware Trace Generating System,'' the Transactions of Korea Information Processing Society, Vol. 5, No. 3, March 1998 (In Korean), pp. 811 - 823.
Gi-Ho Park, Oh-Young Kwon, Tack-Don Han, Shin-Dug Kim, and Sung-Bong Yang, ``Techniques for the Performance Improvement of Instruction Prefetching Mechanisms Based on the Performance Analysis,'' the Journal of the Korea Information Science Society, Vol. 24, No. 10, October 1997. (In Korean) pp. 1037 - 1050.
Oh-Young Kwon, Jun-Cheol Park, Gi-Ho Park, Tack-Don Han, and Shin-Dug Kim, Sung-Bong Yang, ``Compiler Optimization for Locality Improvement of Matrix Multiplication,'' the Journal of the Korea Information Science Society, Vol. 23, No. 12, December. 1996. (In Korean) pp. 1309 - 1319.
Gi-Ho Park, Tack-Don Han, and Shin-Dug Kim, ``An Efficient Instruction Prefetch Scheme using Non-Referenced Prefetched Block Caching,'' the Journal of the Korea Information Science Society, Vol. 22, No. 8, August. 1995. (In Korean) pp. 1263 - 1274.

Patents

Patents Issued

Tack-Don Han, Shin-Dug Kim, Gi-Ho Park, " Cache Memory System and Method for Managing the Same", Korea Patent, Patent No. 10-272165, issued 2000. 8. 23.
Tack-Don Han, Gi-Ho Park, Shin-Dug Kim, "Method of and Circuit for Instruction/Data Prefetching Using Non-Referenced Prefetch Cache" U.K. Patent No. 2299879, Issued 2000. 2. 23.
Tack-Don Han, Gi-Ho Park, Shin-Dug Kim, "Method of and Circuit for Instruction/Data Prefetching Using Non-Referenced Prefetch Cache" Korea Patent No. 146059, Issued 1998. 5. 8.
Tack-Don Han, Gi-Ho Park, Shin-Dug Kim, "Method of and Circuit for Instruction/Data Prefetching Using Non-Referenced Prefetch Cache" France Patent No. 9510520, Issued 1997. 5. 12.

Patents Pending

Tack-Don Han, Gi-Ho Park, Shin-Dug Kim, "Method of and Circuit for Instruction/Data Prefetching Using Non-Referenced Prefetch Cache" Pending in U. S. A., Japan, and Germany.
Tack-Don Han, Shin-Dug Kim, Gi-Ho Park, " Cache Memory System and Method for Managing the Same", Pending in U.S.A, and Japan.

Favorite Web Sites

WWW Computer Architecture Home Page

Penn. State Univ. Microsystem Design Group.

Advanced Computer Architecture Laboratoty at Univ. of Rochester (Prof. David Albonesi)

PARARET: Princeton Arcitecture for Real Power Techniques,'' (Prof. Margaret Martonosi)

Stream Memory Controller (SMC) Home Page

Wisconsin Multiscalar Project

Stanford Hydra Single-Chip Multiprocessor Project

Stanford SimOS Project

IMPACT (Illinois Microarchitecture Project utilizing Advanced Compiler Technology)

Washington SMT (Simultaneous Multithreading) Project

Personal Data

My Home
73 Elizabeth St. #3, Saly Lake City, Utah, 84102
Tel: 1-801-359-9383

Work Address 50 S. Central Campus Drive #3190, School of Computing, University of Utah,
Salt Lake City, Utah, 84112.
Tel: 1-801-581-5618
Fax: 1-801-581-5843

My Home	73 Elizabeth St. #3, Saly Lake City, Utah, 84102 Tel: 1-801-359-9383
Work Address	50 S. Central Campus Drive #3190, School of Computing, University of Utah, Salt Lake City, Utah, 84112. Tel: 1-801-581-5618 Fax: 1-801-581-5843

ghpark@cs.utah.edu

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