Slides of Ratan Nalumasu's PhD defense 

    


  •   "Deriving Efficient Cache Coherence Protocols Through Refinement" (Accepted in FMPPTA'98)) 


  •   "Formal Modeling and Validation Applied to a Commercial Coherent Bus: A Case Study", Charme'97 Workshop, Montreal 


  •   "PV: A Model-Checker for Verifying LTL-X Properties",  NASA LFM'97 Workshop 


  •   "Teaching Formal Methods to Computer System Designers", (Being Revised) 


  •   "A New Partial Order Reduction Algorithm for Concurrent System Verification", CHDL'97, Toledo, April '97) 


  •   "Issues in Formal Verification of Multiprocessor Designs" (Being revised) 


  •   "Application of Formal Verification to the Utah Avalanche Multiprocessor" (Slides of EE-380talk at Stanford) 


  •   "Applying Formal Methods to System-level Hardware Designs" (Slides of talk at Sun Microsystems) 


  •   "Tech-transferring Formal Methods: Personal Experiences" (Slides of talk at Syracuse) 


  •   "Explicit-enumeration based Verification made Memory-efficient", CHDL'95, Tokyo, Aug '95 
 

  •   "Efficient Symbolic Simulation-based Verification Using the Parametric form of Boolean Expressions", IEEE Trans CAD, '94 
 

  •   "Design and Verification of the Rollback Chip using HOP: A Case Study of Formal Methods Applied to Hardware Design", ACM Transactions on Computer Systems, '93 


  •   Verifying a Distributed Pipelined Arbitration Algorithm using VIS 


  •  Some more papers on verification may be found under "asynchronous research papers".