CS/ECE 3810: Computer Organization
Course Information
- Time: Tue/Thu 09:10AM - 10:30AM
- Location: WEB L104
- Instructor: Mahdi Nazm Bojnordi, email: lastname@cs.utah.edu, office hours: email me for appoitment, MEB 3418
- Teaching Assistants: Sumanth Gudaparthi, office hours: Tue. 1:00PM-3:00PM; Lin Jia, office hours: Mon. 10:00AM-12:00PM; Jacqulyn (Jac) MacHardy, office hours: Thu. 3:30PM-5:30PM; Taylor Smith, office hours: Wed. 11:00AM-1:00PM; Meysam Taassori, office hours: Wed. 3:00-5:00PM
- TAs will be available in the CADE Lab during their office hours. Please use the TA Queue to get in line.
- Pre-Requisite: Knowledge of structured programming languages such as C/Java
- Textbook: Computer Organization and Design - The Hardware/Software Interface - 5th Edition, David Patterson and John Hennessy
- Canvas is the main venue for class announcements, homework assignments, and discussions.
Important Policies
Please refer to the College of Engineering Guidelines for disabilities, add, drop, appeals, etc. Notice that we have zero tolerance for cheating; as a result, please read the Policy Statement on Academic Misconduct, carefully. Also, you should be aware of the SoC Policies and Guidelines.
Class rosters are provided to the instructor with the student's legal name as well as "Preferred first name" (if previously entered by you in the Student Profile section of your CIS account). While CIS refers to this as merely a preference, I will honor you by referring to you with the name and pronoun that feels best for you in class, on papers, exams, group projects, etc. Please advise me of any name or pronoun changes (and please update CIS) so I can help create a learning environment in which you, your name, and your pronoun will be respected.
Grading
The following items will be considered for evaluating the performance of students. The cutoffs for the letter grades will be 95(A), 90(A-), 85(B+), etc.
Fraction | Notes | |
---|---|---|
Homework Assignments | 30% | as scheduled below |
Midterm Exam | 30% | in-class, Thu., February 21st |
Final Exam | 40% | 08:00AM - 10:00AM, Mon., April 29th |
Homework Assignments
Homework assignments will be released on Canvas; all submissions must be made through Canvas. Only those submissions made before midnight will be accepted. Any late submission will be considered as no submission.
Release Date | Submission Deadline | |
---|---|---|
Homework 1 | 01/10 | 01/17 |
Homework 2 | 01/17 | 01/24 |
Homework 3 | 01/24 | 01/31 |
Homework 4 | 01/31 | 02/07 |
Homework 5 | 02/07 | 02/14 |
Homework 6 | 02/26 | 03/05 |
Homework 7 | 03/14 | 03/21 |
Homework 8 | 03/21 | 03/28 |
Homework 9 | 04/02 | 04/09 |
Homework 10 | 04/11 | 04/18 |
Class Schedule (subject to change)
The following is a tentative class schedule. Updated lecture slides will be posted on the morning before the lecture.
Date | Lecture Topic | Slides/Videos | Required Reading | Assignment Release |
---|---|---|---|---|
01/08 | Introduction and Logistics | Chapter 1 | ||
01/10 | Measuring Performance | Chapter 1 | Homework 1 | |
01/15 | Performance, Power, Energy | Chapter 1 | ||
01/17 | MIPS ISA I | Chapter 2 | Homework 2 | |
01/22 | MIPS ISA II | PDF, PDF | Chapter 2 | |
01/24 | Assembly Programs | Chapter 2 | Homework 3 | |
01/29 | Control Instructions | Chapters 2 | ||
01/31 | Procedure Calls | Chapter 2; Appendix A | Homework 4 | |
02/05 | Number Representations | Chapter 3 | ||
02/07 | Number Operations | Chapter 3 | Homework 5 | |
02/12 | Multiplication, Division | Chapter 3, Appendix B | ||
02/14 | Floating Point | Chapter 3, Appendix B | ||
02/19 | Mid-term Review by the TAs | |||
02/21 | Mid-term Exam | Chapters 1-3; Appendices A, B; Lectures | ||
02/26 | Floating Point Operations, Logic Design | Chapter 3, Appendix B | Homework 6 | |
02/28 | Hardware for Arithmetic | Appendix B | ||
03/05 | Arithmetic and Logic Unit | Appendix B | ||
03/12 | Review by the TAs | |||
03/12 | Spring Break | |||
03/14 | Spring Break | Homework 7 | ||
03/19 | Sequential Circuits | Appendix B | ||
03/21 | CPU Organization | Chapter 4 | Homework 8 | |
03/26 | Single-Cycle and Pipelined Processor | Chapters 4 | ||
03/28 | Pipeline Hazards I | Chapter 4 | ||
04/02 | Pipeline Hazards II | Chapter 4 | Homework 9 | |
04/04 | Memory System | Chapter 5 | ||
04/09 | Cache I | Chapter 5 | ||
04/11 | Cache II | Chapter 5 | Homework 10 | |
04/16 | Cache III | Chapter 5 | ||
04/18 | Virtual Memory | Chapter 5 | ||
04/23 | Final Review by the TAs |