Organizers: Ryan Stutsman, Anton Burtsev

Time and place: Fridays, 12:00pm, Flux Conference Room (3485 MEB)
Mailing list: lls-sem

This seminar is aimed at deep understanding of new and existing features of modern CPUs (like VMFUNC, SGX, fat pointers (MPX), direct I/O, tagged TLBs, QPI and cache-coherence, etc.) and the way they impact design of OS kernels and virtual machines (e.g., recent systems that utilize fast I/O path (kernel bypass (DPDK)), provide support for fast inter-VM communication, introduce new security abstractions (Intel SGX), utilize fast synchronization (lock-free data structures and HTM), and so on).

Most likely each time we will be reading a paper that we believe provides the best description of a specific feature. However, it is always assumed that we all carefully read the Intel manuals (you can find links to the manuals on GeneralResources page.

Schedule

  • 01/15: Fast context switching with VMFUNC. Main paper: SeCage, other resources are in Notes.
  • 01/22: VMFUNC Episode 2. Main paper: CrossWorld Switches, notes here Notes.
  • 01/29: (CSL Seminar) Direct Interrupt Delivery for VMs. Main paper: DID. Other resources are in Notes.
  • 02/05: Intel SGX. Main paper: SGX Explained. Other resources are in Notes.
  • 02/12: PCI Express and DMA. Main paper: DC Express. Other resources are in Notes.
  • 02/18: Canceled for grads visit
  • 02/26: Intel MPX. Main paper: Intel Enabling MPX Guide. Other resources are in Notes.
  • 04/01: Intel cache coherence and QPI. Main paper: Weaving High Performance Multiprocessor Fabric: Architectural Insights to the Intel QuickPath Interconnect (see the mailing list for the scan). Other resources are in Notes.
  • 04/01: Intel memory consistency model (TSO). Main paper: Memory Barriers: a Hardware View for Software Hackers. Other resources are in Notes.