OBJECTIVE
Full time
position in development or research .
AREAS OF INTEREST
Computer Architecture
Operating Systems
Memory Systems
Digital VLSI Design
EDUCATION
MS. Computer Science & Engineering,
University of Utah (Fall’2004 onwards) GPA : 3.86/4.0
B.Tech. Electrical Engg., Indian Institute
of Technology (IIT), Kharagpur(2000-2004). GPA : 8.2/10.0
COURSES
TAKEN
| MS |
B.Tech
|
Advanced
Computer
Architecture
Operating systems
Compiler Design and principles
Digital VLSI Design
Parallel Computer Architecture
Realistic Image Synthesis
Foundations of Computer Science
High Performance computer architecture |
Digital
Signal
Processing
VLSI system Design
Data Communication Networks
Computer Organization and architecture
Electronic Design Automation
Analog Electronic circuits
Digital Electronic Circuits
Instrumentation System Design |
WORK
EXPERIENCE
* Teaching Assistant for Digital
System Design, Computer Design lab,
Digital VLSI Design and Discrete structures. Duties included assisting
students in their project work, grading assignments,
holding TA hours and leading lab sessions.
* Research Assistant, Memory Profile
analysis of gridded Ray Tracing Algorithm, May- August'2005 School of
Computing, University of Utah.
MASTERS’
THESIS
Memory
system design for a Gridded Ray tracer
Advisor : Dr. Pete Shirley & Dr. Steven
Parker.
Ray
tracing’s hardware realization is limited by its high computational
complexity and unpredictable memory access pattern which changes for
different scenes and viewpoints. While computational complexity can
be dealt with by providing more faster computational units, memory
complexity still poses a non-trivial bottleneck. In this thesis, we
intend to come up with efficient memory architecture for a grid based
ray tracer.
PROJECTS
* B.Tech Thesis
Thesis
Title : VLSI Design of Modulators for multicarrier systems based
on CORDIC algorithm
Advisor : Dr. Saswat Chakraborty
*
Designed and implemented a 12-bit high speed, low power, pipelined
CORDIC (Coordinate Rotation Digital Computer) for use in Digital IQ
modulation.
* Designed
and implemented a multicarrier modulation architecture based on CORDIC,
reconfigurable for use in any multicarrier modulation scheme with clear
benefits over conventional FFT based approaches.
*
Designed and
Implemented a Rotation based Delay controlled Transconductance-C
oscillator for OFDM signal generation which used the CORDIC algorithm
for generating the waveform.
* Design of a microcontroller on FPGA
*Implemented a prototype microcontroller with the instruction
set of CR-16 on FPGA and interfaced it with an SDRAM, VGA and UART
using tools like ISE webpack, Modelsim and Verilog as a part of the TA
work for computer Design lab.
* Yalnix
Operating System
* Designed
and implemented a linux-like kernel (yalnix) doing memory management,
task scheduling, interrupt handling, context switching, inter-process
communication, terminal I/O handling and various system calls like
fork, exec, wait.
* MiniJava Compiler
*
Designed
and implemented the scanner, parser, checker, IR-tree generator and
Assembly code generator for MiniJava using tools like JavaCC and Java.
* Path Tracing
project
* Implemented
a monte-carlo path-tracer with various effects like Rayleigh
scattering, absorption, subsurface scattering and BRDF models like
Lambertian and Ward.
* Realtime
speech signal processing software
*
Developed a realtime
speech signal processing software interfacing with the sound card in
VC++.
PUBLICATIONS
* “A
Unified Architecture for multicarrier modulations”, National
Conference on Communications, 2004, Indian Institute of Science,
Bangalore, India.
* “Design
and implementation of Analog Multitone Signal Generator Using
Regenerative frequency divider for OFDM Tranceiver”, Third IEEE
International Workshop on Electronic Design, Test and Applications
(DELTA'2006).
* “Design
and
Implementation of Analog multitone signal generator for OFDM transceiver”
Accepted for IEEE SouthEastCon, 2006.
SKILLS
* Operating systems :
Unix, Windows.
* Programming
Languages: C, C++, Assembly Language for x86 and MIPS.
* VLSI CAD tools
*Cadence
Tool Suite ( Virtuoso schematic editor, Analog Environment, Verilog XL,
Virtuoso Layout editor, Abstract generator, Silicon ensemble, ICC Chip
assembly router)
*Synopsys
Tool suite (Design compiler, Design Analyzer, Library compiler, VCS,
module compiler)
*Xilinx
tools for FPGA (ISE, Modelsim)
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