WoNDP: 1st Workshop on Near-Data Processing

In conjunction with the

46th IEEE/ACM International Symposium on Microarchitecture (MICRO-46)

Sunday, December 8th, 2013
Davis, California

Keynote Abstracts and Bios:

Steve Swanson

Near-Data Computation: It's Not (Just) About Performance

Abstract: Moving computation into the memory/storage hierarchy can offer great improvements in bandwidth for data centric computations, but it's potential goes far beyond that. We explore the potential of making programmability a central feature of the SSD interface. In particular, we focus on making the semantics of operations programmable. This allows programmers to add (and compose) new features such as caching, virtualization, file system permission checks, and transactions processing.

We have implemented a prototype Software Defined Solid State Disk (SDSSD) that supports this type of programmability. Programs can download SSD apps to modify the behavior of the device and add novel features. We demonstrate the effectiveness and flexibility of the SDSSD by implementing three SSD apps and comparing their complexity and performance to fixed-function implementations. We find that defining SSD semantics in software reduces performance by small margin, but drastically reduces the time required to implement new functions. As a result, the SDSSD makes it feasible for any application to benefit from a customized SSD interface.

Bio: Steven Swanson is an associate professor in the Department of Computer Science and Engineering at the University of California, San Diego and the director of the Non-volatile Systems Laboratory. His research interests include the systems, architecture, security, and reliability issues surrounding non-volatile, solid-state memories. He also co-leads projects to develop low-power co-processors for irregular applications and to devise software techniques for using multiple processors to speed up single-threaded computations. In previous lives he has worked on scalable dataflow architectures, ubiquitous computing, and simultaneous multithreading. He received his PhD from the University of Washington in 2006.

Troy Manning

Moore's Law is Dead. Love Live Moore's Law!

Abstract: Moore's law, the doubling of transistor count approximately every two years leading to a likewise doubling of processing capability, is nearing its end as semiconductor process nodes drive toward sub 10nm, quite possibly in the next decade. This need not spell the end of the doubling of capability, but signal the need for compute architectures that may modify the gold standard Von Neumann architecture. The window of opportunity for Processing Near Memory, or even In Memory Processing may be opening.

Bio: Troy Manning is Director of Advanced Memory Systems for Micron's DRAM Solutions Group. Troy joined Micron in 1990. During his time at Micron, he served as a Product Engineer in the 4Mb DRAM era, 16 years as a DRAM design engineer, 4 years as Director of Advanced SSD Architecture as a founding member of the NAND flash SSD group prior to his current role of researching advanced memory system solutions. As a DRAM design engineer, Troy has worked in all design areas of a DRAM as well many generations and operating modes with several projects reaching high volume production: Page Mode, EDO, Burst EDO, SDRAM-GDDR5, and array architect of Micron's first Hybrid Memory Cube. Troy has authored or co-authored over 250 issued US patents and 225 foreign patents in the areas of DRAM design and architecture and solid state storage systems. He received B.S. in Electrical and Computer Engineering from the University of Iowa in 1990.

Jichuan Chang

Nanostores and Beyond: Why near-data processing might be real this time.

Abstract: This talk will provide an overview of Nanostores, a resource-efficient architecture for data centric computing, discuss a few lessons we have learned from its design and evaluation, and present some key hardware/software directions that could make near data processing real this time.

Bio: Jichuan Chang is currently a Principal Research Scientist at HP Labs. His research interests include computer system architecture and memory systems, with a focus on co-designing cost and energy efficient platforms. He received his Ph.D. from University of Wisconsin-Madison, and has three papers selected as IEEE Micro's Top Picks.

Richard Murphy

Everything Old is New Again... or What's Changed Since We Last Considered Near Memory Operations.

Abstract: Processing-In-Memory and Processing-Near-Memory have been rich areas of research for decades. This talk will make the case that in addition to addressing fundamental technology barriers, a breakthrough in Near Memory Processing will address the economic challenges related to the maturity of Moore's Law.

Bio: Dr. Richard Murphy is Senior Advanced Memory Systems Architect for Micron's DRAM Solutions Group and is focused on future memory platforms, including processing-in-memory.

Prior to joining Micron in 2012, Murphy was a Principal Member of the Technical Staff at Sandia National Laboratories. He also worked as a technical staff member at Sun Microsystems and served as the Principal Investigator of several advanced computing R&D efforts, including projects for the Defense Advanced Research Projects Agency (DARPA) and the Department of Energy (DOE).

Murphy's specialties include research and development of computer architecture, advanced memory systems, and supercomputing systems for physics and data-intensive problems. He has led several large multidisciplinary teams in the successful creation of new technologies. He also cofounded the Graph 500 benchmark and currently chairs its executive committee.

Murphy is Adjunct Faculty in the Electrical and Computer Engineering Departments at the Georgia Institute of Technology and New Mexico State University. He is the author of over two dozen papers and two patents. He holds a PhD in computer science and engineering, as well as an MS, BS, and BA from the University of Notre Dame. Dr. Murphy is a Senior Member of the IEEE.