Overview

The use of threading is already widespread, and will experience explosive growth moving into the future, given that tomorrow's performance / energy goals will be met through the increased use of threads and "multicores" (chip level multiprocessors). Unfortunately, the correctness problems in this arena are daunting, as well as are far from being solved. TV06 invites papers addressing the tussle between correctness, reliability, and performance in this space.

Workshop Proceedings

Invited Talks

• Maurice Herlihy, Brown University, Providence, RI, "What Can We Prove about Transactional Memory?"
• Nir Shavit, Sun, "Transactional Locking"
• Wolfram Schulte (Microsoft) joint with Bart Jacobs (Leuven), "A simple sequential reasoning approach for sound modular verification of mainstream multithreaded programs"
• Vijay Saraswat, IBM T.J. Watson Research Labs, Yorktown Heights, NY, "A framework for memory models and its application to X10"
• Paul Petersen, Intel, "Multicore Software Development: Encouraging an Industry Transition"

Program Committee

• Arvind  MIT CSAIL, USA
• Hans Boehm  HP, USA
• Ching Tsun Chou  Intel, Santa Clara,USA
• Byron Cook  Microsoft Research, Cambridge,UK
• Robert P. Cook  Georgia Southern University, USA
• Cormac Flanagan   UC Santa Cruz, USA
• Mike Kirby  University of Utah, USA
• Timothy G. Mattson  Intel, DuPont, USA
• John Regehr  University of Utah, USA
• Scott Stoller  SUNY at Stony Brook, USA
• Shaz Qadeer  Microsoft Research, USA
• Yue Yang  Microsoft, USA

Organizers

• Ganesh Gopalakrishnan, University of Utah, Salt Lake City, UT, USA
• John O'Leary, Intel, Hillsboro, OR, USA
  

Important Dates

Deadline for submissions: May 15, 2006
Notification of acceptance: June 20, 2006
Final manuscript due: July 20, 2006
Workshop: August 21-22, 2006

Paper Submission

Workshop Program

• Day 1, August 21, 2006
• Session 1 (08:30 - 10.30) : Experience Reports, Transactions I
• 08.30 - 09.00 Robert Cook, "Thread Verification: an experience report"
• 09.00 - 09.30 Arndt Mühlenfeld and Franz Wotawa, "Fault Detection in Multi-Threaded C++ Server Applications"
• 09.30 - 10.30 Invited Talk: Maurice Herlihy (Brown University), "What Can We Prove about Transactional Memory?"
• 10.30 - 11.00 COFFEE BREAK
• Session 2 (11.00 - 12.30) : Abstraction Refinement, Typing I
• 11.00 - 11.30 Alexander Malkis, Andreas Podelski and Andrey Rybalchenko, "Thread-Modular Verification and Cartesian Abstraction"
• 11.30 - 12.00 Chiara Braghin and Natasha Sharygina, "Modeling and Verification of Mobile Systems"
• 12.00 - 12.30 Frederic Dabrowski and Frederic Boussinot, "Cooperative threads and preemptive computations"
• 12.30 - 14.00 LUNCH BREAK
• Session 3 (14.00 - 15.30) : Checkpointing, Transactions II
• 14.00 - 14.30 Lukasz Ziarek, Philip Schatz and Suresh Jagannathan, "Checkpointing for Atomicity"
• 14.30 - 15.30 Invited Talk: Nir Shavit (Sun), "Transactional Locking."
• 15.30 - 16.00 COFFEE BREAK
• Session 4 (16.00 - 18.00) : Verification, Open Discussions
• 16.00 - 17.00 Invited Talk: Wolfram Schulte (Microsoft) and Bart Jacobs (Katholieke Universiteit Leuven), "A simple sequential reasoning approach for sound modular verification of mainstream multithreaded programs."
• 17.00 - 18.00 Open Mike (moderated 5-minute sessions open to all attendees)
• Day 2, August 22, 2006
• Session 5 (08.30 - 10.30) : Memory Models
• 08.30 - 09.00 Lisa Higham, LillAnne Jackson and Jalal Kawash, "What is Itanium Memory Consistency from the Programmers Point of View?"
• 09.00 - 09.30 Jan-Willem Maessen and Arvind, "Store Atomicity for Transactional Memory"
• 09.30 - 10.30 Invited Talk: Vijay Saraswat (IBM T.J. Watson Research Center), "A framework for memory models and its application to X10."
• 10.30 - 11.00 COFFEE BREAK
• Session 6 (11.00 - 12.30) : Short Papers, Mutation Testing
• 11.00 - 11.15 Jeff Napper and Lorenzo Alvisi, "Robust Multithreaded Applications"
• 11.15 - 11.30 John Regehr, "Thread Verification vs. Interrupt Verification"
• 11.30 - 11.45 Muhammad Umar Janjua and Alan Mycroft, "Automatic Correcting transformations for Safety property violations"
• 11.45 - 12.00 Yaniv Eytani, Yosi Ben Asher, Eitan Farchi and Shmuel Ur, "Noise Makers Need to Know Where to be Silent: How to Produce Schedules that Find Bugs"
• 12.00 - 12.30 Shmuel Ur and Shady Copty, "Toward Automatic Concurrent Debugging Via Minimal Program Mutant Generation with AspectJ"
• 12.30 - 14.00 LUNCH
• Session 7 (14.00 - 16.00) : Typing II, Multicores, Discussions
• 14.00 - 14.30 Vasco Vasconcelos and Francisco Martins, "A Multithreaded Typed Assembly Language"
• 14.30 - 15.30 Invited Talk: Paul Petersen (Intel), Multicores (tentative title)
• 15.30 - 16.30 Moving Forward - what next? (Open Discussions)