The University of Utah Computer Science Department has research efforts in computer architecture, VLSI circuits and systems, asynchronous and self-timed circuits and systems, formal methods for hardware verification, and innovative memory and I/O architectures.
| Rajeev Balasubramonian | High-performance microarchitectures, low-power microprocessors, memory hierarchy design |
| Erik Brunvand | Asynchronous systems, VLSI, computer architecture |
| John Carter | Multiprocessor architecture, operating systems, distributed computing |
| Al Davis | High-performance computer architecture, VLSI design and embedded computing |
| Ganesh Gopalakrishnan | Protocol Verification - Methods and Tools, Shared memory consistency models, Parallel and Distributed Computing |
Affiliated Faculty
| Sneha Kasera | Computer networks and systems, mobile systems and wireless networks, network security |
| Jay Lepreau | Operating systems, security, networking, languages |
| Chris Myers (E.C.E Department) | Timed asynchronous circuits and systems |
| John Regehr | Embedded systems, real-time systems, operating systems, static analysis |
| Kenneth Stevens (E.C.E. Department) | Asynchronous circuit design and architecture, timing analysis and formal verification |
Graduate Students
| Ritwik Bhattacharya | Models for efficient protocol verification |
| Xiaofang Chen | Verification of cache coherence protocols |
| Liqun Cheng | Multiprocessor computer architecture, parallel computing, memory systems, coherence protocols |
| Zhen Fang | Smart memory controllers, processing in the memory system, synchronization, architecture simulation |
| Vamshi Krishna Kadaru | Asynchronous Circuits and Systems |
| Niti Madan | Reliability aware micro-architectures |
| Naveen Muralimanohar | Power aware micro-architectures, non-uniform cache design, interconnect design for cache coherence |
| Dave Nellans | Asynchronous circuits and systems |
| Mike Parker | Computer architecture, memory systems |
| Eric Peskin | Asynchronous circuits, reconfigurable systems |
| Robert Palmer | Model-checking parallel scientific computing software |
| Karthik Ramani | Compilers for reconfigurable embedded systems, Temperature aware micro-architectures |
| Ryan Romney | Rapic SOC composition Library |
| Yu Yang | Multi-threaded software verification | Junglin Yang | Asynchronous circuits and systems |
Undergraduate Students
| Eric Kuehne | Asynchronous circuits |
Current research projects
- Exploiting Fast, On-Chip Wires
- A project that explores how power and performance bottlenecks can be allieviated by exposing wires properties to the architectural level.
- Formal Methods in System Design and Verification
- Formal Verification of multiprocessor cache protocols, bus protocols, and such.
Recent research projects
- Avalanche Project
- A project to develop an innovative memory and communication architecture for large scale multiprocessors.
- Asynchronous Circuits and Systems, ACK, and ACT
- The Utah Asynchronous Systems research program aims to develop tools for the high-level synthesis of asynchronous circuits and systems, as well as design for testability tools for asynchronous circuits and systems.
- Impulse Project
- The overall objective of the Impulse Project is to narrow the cpu/memory performance gap. To do so, Impulse involves the development and evaluation of a configurable main memory controller whose behavior can be adapted by software based on the expected or observed memory access patterns of applications.
- Center for Asynchronous Circuit and System Design
- A Utah State Center of Excellence involved in applying timed asynchronous circuits to a variety of problem domains.
please send mail to elb@cs.utah.edu with corrections and additions