Call for Papers for

The Eleventh Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW-11)

Immediately preceding the 14th International Symposium on High Performance Computer Architecture (HPCA-14)

To be held in Salt Lake City, Utah

February 17th, 2008


 

The function of this workshop is the discussion of work-in-progress that utilizes commercial workloads for the evaluation of computer architectures.  By discussing this ongoing research, the workshop will expose participants to the characteristics of commercial workload behavior, provide an understanding of how commercial workloads exercise computer systems and help establish methodologies for measuring, modeling and analyzing the execution time characteristics of these workloads.  Also this year an emphasis will be placed on tools for analysis, as recent advances in this area have enabled them to better handle large, complex workloads.


Final Program

8:00 8:30 am

Registration

8:30 am - 8:40 am

Opening Remarks

8:40 am - 9:30 am

Session 1: Keynote

Commercial Computing and High Performance Computing: How different are they?

Abstract: This talk provides an overview of application characteristics and the decision criteria for commercial computing and HPC. It covers general conceptions for HPC and commercial and why those are gross generalizations. It then compares and contrasts the different segments for each pointing out which segments have similarities and also the differences between those segments. It concludes by showing how systems that are designed for HPC can do well in the commercial space.

Don DeSota
IBM

9:30 am - 10:00 am

Coffee Break

10:00 am 11:00 am

Session 2: Workload Characterization

Trends in Legacy and Emerging Commercial Workloads
Bill Maron, Bret Olszewski, Mala Anand, Steve Kunkel, and Thomas Chen
IBM

Understanding the Working Sets of Data Mining Applications
Kelly A. Shaw
University of Richmond

11:00 am 12:00 pm

Session 3: Systems Modeling and Architecture

Write Update Optimizations for CC-NUMA Systems
Liqun Cheng and John B. Carter
Intel and University of Utah

An M/G/1 Queue Model for Multiple Applications on Storage Area Networks
Emmanuel Arzuaga and David Kaeli
Northeastern University

12:00 am - 1:30 pm

Lunch

1:30 pm 3:00 pm

Session 4: Sensitivity and Scalability

Varying Memory Size with TPC-C: Performance and Resource Effects
Jay Veazey and Blaine Gaither
Hewlett-Packard

An Analysis of the Sensitivity of SPECjAppServer2004 to the Memory Sub-System
Rajeev Garg, Kumar Shiv, Andrew Sun, Mahesh Bhat, and Michael Jones
Intel

Scalability Study of a Java Application Server on Two Multi-core Systems
Yohei Ueda, Hideaki Komatsu, and Toshio Nakatani

IBM Toyko Research Laboratory

3:00 pm - 3:30 pm

Coffee Break

3:30 pm - 5:00 pm

Session 5: Memory Characterization

Memory Characterization of Emerging Recognition-Mining-Synthesis Workloads for Multi-Core Processors
Yu Chen, Aamer Jaleel, Wenlong Li, Junmin Lin, and Zhizhong Tang
Tsinghua University, Beijing, China and Intel

Characterizing Memory Behavior of XML Data Querying on CMP
Hong Liu, Rubao Li, Qiang Gao, Bihui Duan, and Taoying Liu
Graduate School of the Chinese Academy of Sciences, Beijing, China

Memory Characterization of SPEC CPU2006 Benchmark Suite
Junmin Lin, Aamer Jaleel, Yu Chen, Wenlong Li, and Zhizhong Tang
Tsinghua University, Beijing, China and Intel

5:00 pm

Participant Feedback

Closing Remarks

 

Intended Audience

 

Workshop Organizers


Past workshops