Power and Temperature aware architecture

by
Naveen Muralimanohar

Advised by
Rajeev Balasubramonian

Computer system performance has increased tremendously in the last three decades, owing to huge improvements in semi-conductor technology and increasing integration capacity to realize complex architectures. In the future, performance improvements will be hindered by rocketing power density and sluggish wires that communicate data across the chip. For example, the recent version of the Pentium 4 processor consumes as much as 115 watts at a peak temperature of 70 C (158 F). Thus, future designs will have to deliver the required performance in a permissible power envelope. In this study, we propose novel architectural techniques that manage wires and modules efficiently to achieve high performance while keeping the power and thermal dissipation under agreeable levels.