Design of a Cell Library for Asynchronous Microengines

by
Gaurav Gulati

Advised by
Erik Brunvand

Asynchronous microengines are an attractive alternative to globally synchronous systems for the realization of high-performance programmable controllers. However, because of the specific demands of asynchronous signaling, it is not always easy to use existing standard cell libraries to implement asynchronous microengines. In this work we present the design and evaluation of a CMOS cell set that augments a generic cell library with cells specific to the design of asynchronous microengines. These cells encapsulate behavior and timing information critical to the implementation of asynchronous microengine controllers. These special purpose cells result in higher performance circuits, and in a significant reduction in design time over a generic library. The augmented library also allows designers to experiment with different architectural configurations, knowing that low-level circuits will behave correctly in an asynchronous environment. To validate the library, the control path of a popular asynchronous controller benchmark has been designed and fabricated through MOSIS.