Mesh Tiling

by
Dave DeMarle

Advised by
Steve Parker

Some of the time required to render an image is determined by the speed of the memory subsystem of the machine used to create the image. As the size of the input data grows and the speed of processors grows faster than the access time for memories does, the fraction of the total time spent accessing memory increases. Todays high resolution scientific data sets can easily consume gigabytes of storage, and severely stress or overwhelm outright the capabilities of even high performance computing platforms for interactive rendering applications. When this is the case the memory layout of the renderable data affects the achievable rendering rate. The research presented here applies the concept of multilevel bricking to polygonal surfaces represented in indexed mesh format. As in the case of multilevel volumetric bricking, this technique increases cache hit rates, which decreases the memory access time and increases the rendering rate. A surface based algorithm for reordering meshes is explained, and performance analysis results are given.