Abstract
As we aim for increased performance within stringent energy efficiency requirements, specialization and heterogeneity are becoming the norm in processor architectures. The benefits of such architectures, however, are often limited by the capabilities of their memory systems and the developer effort needed to achieve high memory system efficiency. This demands memory system evolution in a manner that not only addresses raw capabilities but also ease of programmability. In this talk, I will discuss features of upcoming Heterogeneous System Architecture (HSA) platforms from AMD (and other vendors) that can significantly improve both of these aspects for accelerator-based heterogeneous processors. I will then discuss our research that builds on HSA to address emerging challenges in memory systems using two illustrating examples from the perspectives of the capabilities they enable and their programming implications.

BIO
Nuwan Jayasena is a Senior Member of Technical Staff at AMD Research. His research interests span a variety of areas including memory systems, stream computing, performance modeling and energy efficiency. Nuwan holds M.S. and Ph.D. degrees in Electrical Engineering from Stanford University and a B.S. from the University of Southern California. Prior to AMD, Nuwan worked on various processor and memory system architecture aspects at Stream Processors Inc. and Nvidia Corp.

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