University of Utah
Department of Computer Science
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Associate Professor of Computer Science
Ph.D.
, State University of New York at Stony Brook, 1986
Professor Gopalakrishnan's
research is primarily
in two areas: asynchronous circuit design and formal verification.
His asynchronous design group is developing synthesis algorithms to
generate asynchronous circuits from descriptions in high-level hardware
description languages (currently an enhanced subset of Verilog).
A tool embodying these algorithms features user-guided partitioning and
complex-gate generation.
His formal verification group is involved in the verification
of the protocols (pertaining to distributed shared memory management
as well as message passing) used in an experimental multiprocessor
``Avalanche'' under construction at Utah.
By using verification as a design aid, we hope to not only
detect protocol errors at the earliest stages of design but
also provide verified models for synthesis into VLSI circuits.
He is also involved in the design of a high-speed image compression
chip that uses novel clock distribution methods.
He is a member of IFIP working-group 10.5.
- Prabhakar Kudva, Ganesh Gopalakrishnan, and Venkatesh Akella,
``An Asynchronous High Level Synthesis
System Targeted at Interacting Burst-Mode
Controllers'',
Proceedings of the 1995 Computer Hardware Description
Languages, Chiba, Japan,
August, 1995.
- Jae-Tack Yoo, Ganesh Gopalakrishnan, Kent Smith, and
John Mathews, ``Counterflow-Clocked Pipelining Illustrated on
the Design of High Speed HDTV Subband Vector Quantizer Chips'',
Advanced Research on VLSI, Chapel Hill, March 1995.
- Venkatesh Akella and Ganesh Gopalakrishnan,
``Specification and Validation Control Intensive ICs in hopCP'',
IEEE Transactions on Software Engineering,
Vol.20, No.6, June 1994, pages 405-423.
- Prabhat Jain and Ganesh Gopalakrishnan,
``Efficient Symbolic Simulation Based Verification
Using the Parametric Form of Boolean Expressions'',
IEEE Transactions on Computer Aided Design, Vol.13,
No.8, August 1994, pages 1005-1015.
- Ganesh Gopalakrishnan, Erik Brunvand, Nick Michell,
and Steven M. Nowick, ``A Correctness Criterion for
Asynchronous Circuit Validation and Optimization''.
IEEE Transactions on
Computer Aided Design, Vol.13, No.11, November 1994, pp.
1309-1318.
}
Next: David H. Hanscom
Up: CS Faculty And Their Research Interests
Previous: Al Davis
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