Refreshments 3:20 p.m.
Abstract
We are faced with an explosion in parallelism at all levels of
large scale systems. Multi-core chips have become ubiquitous and
almost all large scale systems use them. Systems such as Lawrence
Livermore National Laboratory's BlueGene/L and Oak Ridge National
Laboratory's Jaguar already have over 100,000 processor cores. The
recently announced ASC Sequoia will have over 1.5 million cores when
it is deployed in FY12. Los Alamos National Laboratory's Roadrunner
system features a heterogeneous node architecture that requires the
use of three different compilers to build a single application.
Hardware support for other novel parallelism mechanisms, such as
transactional memory and thread level speculation, are likely to
appear in systems in the near future. Further, future systems are
likely to have much less off-chip and off-node bandwidth per core
as well as significantly smaller main memories per core. These
trends will necessitate significant changes in applications and
the development environment that supports them. We will require
new mechanisms to target applications to these architectures, to
identify and to solve software defects that arise in those
applications and to understand and to improve their performance.
In this talk, I will detail the overall National Nuclear Security
Administration's Advanced Simulation and Computing (ASC) Program's
development environment strategy for current and future large scale
systems and several novel directions that we are pursuing as part
of that strategy.
BIO
Bronis R. de Supinski is the co-leader in the Advanced Simulation and
Computing (ASC) program's Application Development Environment and
Performance Team (ADEPT) at Lawrence Livermore National Laboratory
(LLNL). His research interests include high performance computer
architectures, performance modeling and analysis, message passing
implementations and tools, memory performance improvement, cache
coherence and distributed shared memory, consistency semantics and
programming models. Bronis earned his Ph.D. in Computer Science from
the University of Virginia in 1998 and he joined LLNL's Center for Applied
Scientific Compuiting (CASC) in July 1998. Currently, his projects include
applications of data mining techniques to performance analysis and modeling,
scalable debugging methods, investigations into mechanisms and tools to
improve memory performance, a variety of optimization techniques and tools
for MPI and several issues with OpenMP, including its memory model and
tool support. He pursues the last set of topics as the Chair of the OpenMP
Language Committee. Throughout his career, Bronis has won several awards,
including the prestigious Gordon Bell Prize in 2005 and 2006. He is a
member of the ACM and the IEEE Computer Society.