CS 5720/6720 - Advanced Integrated Circuit Design II

Last updated on  April 16th,  2001


Course Objectives

The course this semester is devoted to gaining an understanding of mixed-signal (Analog/Digital) CMOS Integrated Circuits. Fundamental building blocks for analog circuits will be discussed, including the basic principles for the design of op amps, current mirrors and comparators. The basics of discrete-time signals and filters will be covered. Implementation of switched capacitor circuits, A/D and D/A converters, and oversampled converters will be discussed.


Teaching Staff

Instructor:

 

Dr. Kent Smith

MEB 3428

   

Teaching Assistant:

 

Ashwin Krishnakumar

MEB 3163


Meeting Times

CS/EE 5720/6720 meets from 10:45a.m - 12:05p.m on Mondays and Wednesdays in EMCB 104

Office Hours

Kent's Office Hours : By appointment.

TA's Office Hours  : M W 12:05 p.m - 1:05 p.m in MEB 3163. By appointment on other days.

You can make appointments by sending email to Dr. Kent Smith or Ashwin Krishnakumar


Getting Information

Occasionally the Instructor or the TA for the class may send out e-mail messages to all students in the class (e.g., announcements, cancelled class, other change in schedule, etc) . Such information will be sent to the class mailing list cs5720@cs.utah.edu , open to all students for subscription. Also, the purpose of the mailing list is to allow students to ask questions or discuss course material with their fellow students (and instructors). You may subscribe to this mailing list by sending an email to majordomo@cs.utah.edu with subscribe cs5720 in the body of the message.

You can also subscribe to the class mailing list from this web page by clicking on the button.

Also, you may e-mail the instructors at teach-cs5720@cs.utah.edu.


Grading Policies

There will be one midterm exam and one final project, and approximately 8 homework assignments.

Homework:   40% 
Midterm Project:   30% 
Final Project:   30% 

If you notice any discrepancies in your homework grades when you pick up the graded homeworks, you should see the TA as soon as possible. After 2 weeks from when homework has been returned, no changes will made to your homework grades.

         View your grades here 

THERE IS NO PROVISION FOR TURNING IN LATE ASSIGNMENTS

Assignment due dates will be marked clearly on the assignments, or announced in the class. They should be turned in as stated on the assignments. Please do not turn in assignments in class. There is a box in front of the CS office for handing in assignments. Also note that some assignments may require using electronic handin.


Latest Class Information

The midterm project submission has been postponed to Thursday (Apr. 12th, 2001).

The midterm project question papers have been handed out in the class on Wednesday (03/28/2001). The question papers will NOT be posted on the web. If you missed the class and didn't receive a copy of the question paper, you will need to see the TA immediately. The midterm project due in two weeks (i.e., on 04/11/01).


How to Survive Cadence

  Instructions for doing a DC Sweep.

  How to plot the slope of a curve.

  Tutorial on Mixed Signal Simulations


Assignments and Handouts

These handouts are in PDF format. If you wish to view and/or print them, you must have Adobe Acrobat reader configured within Netscape or Internet Explorer.

o  01/09   Syllabus
o  01/09  Cadence Tutorials
o  01/09  Mini Project1 (CS/EE 5710) Practice assignment for the students who have not taken the CS/EE 5710/6710 class. Also look at http://www.eng.utah.edu/~cs5710 for more handouts of CS 5710.
o  01/09  Homework #1  (Due January 24th, 2001)
o  01/24  Transistor Parameter Measurements
o  01/24  Homework #2  (Due February 9th, 2001)
o  01/31  Homework #3  (Due February 13th, 2001)
o  02/14  Homework #4  (Due February 28th, 2001)
o  02/28  Homework #5  (Due March 19th, 2001)
o  04/15  Final Project  (Due Apr 25th, 2001)


VLSI Related Sites

oCascade.
oCadence.
oMosis.
oSynopsys.


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