CS/EE 3700 - Digital System Design
Spring 2008

Initial Lecture Plan

Please make sure to read the relevant sections in the book before the lectures!

• Tuesday, Jan 8: Intro, Electronics Review
• Thursday, Jan 10: Electronics, intro to switching circuits and logic, truth tables. Sections 2.1-2.5

• Tuesday, Jan 15: Logic gates, Sum of Products, Product of Sums, etc. Sections 2.6-2.9
• Thursday, Jan 17: Boolean function manipulation, Verilog intro. Sections 2.10-2.11

• Tuesday, Jan 22: More Boolean theorms and Verilog. Chapter 2
• Thursday, Jan 24: Gate Implementation. Sections 3.1-3.4

• Tuesday, Jan 29: More gate implementation. Sections 3.5-3.11
• Thursday, Jan 31: Intro to Karnaugh maps. Sections 4.1-4.4

• Tuesday, Feb 5: More Karnaugh maps. Sections 4.5-4.8
• Thursday, Feb 7: Quine-McCluskey tabular minimization Section 4.9

• Tuesday, Feb 12: Number representation. Sections 5.1-5.2
• Thursday, Feb 14: Signed/unsigned numbers, addition. Sections 5.3-5.4

• Tuesday, Feb 19: More adders, and Verilog for arithmetic. Sections 5.5-5.6
• Thursday, Feb 21: MID-TERM EXAM I covering Chapters 1-4

• Tuesday, Feb 26: Other number systems - floating point, BCD, etc. and ASCII. Sections 5.7-5.8
• Thursday, Feb 28: Combinational circuits - muxes, Shannon expansion, decoders, encoders. Sections 6.1-6.4

• Tuesday, Mar 4: Combinational Circuits and arithmetic comparisons. Section 6.5
• Thursday, Mar 6: Verilog for Combinational citcuits. Sections 6.6-6.7

• Tuesday, Mar 11: Sequential Circuits I - flip flops and latches. Sections 7.1-7.7
• Thursday, Mar 13: Sequential Circuits II - More flip flops and latches, plus counters, registers etc. Sections 7.8-7.11

• Tuesday, Mar 18: Spring Break - No Class
• Thursday, Mar 20: Spring Break - No Class

• Tuesday, Mar 25: Verilog for sequential circuits. Sections 7.12-7.14
• Thursday, Mar 27: Finite State Machines I - 8.1-8.3

• Tuesday, Apr 1: Finite State Machines II - more examples
• Thursday, Apr 3: MID-TERM EXAM II covering chapters 5-7

• Tuesday, Apr 8: Finite State Machines III - using Verilog to describe finite state machines. Sections 8.4-8.9
• Thursday, Apr 10: Digital System Design I. Sections 10.1-10.2

• Tuesday, Apr 15: Digital System Design II - Examples. Sections 10.3-10.4
• Thursday, Apr 17: Digital System Design III - More examples...

• Tuesday, Apr 22: Future Directions - where do you go from here?