Concepts from Chapters 1-4 (Midterm I)

Chapter 0 (prerequsites)

- current, voltage, resistance, capacitance
- V=IR, P=IV, P=(I**2)(R), I=Q/t, C=Q/V, RC=t
- Parallel and series connections of resistors and capacitors
- Charging and discharging of capacitors 

Chapter 2

- switching logic
- truth tables
- logic gates
- Boolean algebra and theorems
- Implication operations (logic puzzles)
- SOP/POS forms of Boolean expressions
- minterms/maxterms, canonical forms
- NAND/NAND and NOR/NOR two-level circuits
- MUX circuit
- Verilog - gate descriptions, continuous assignments, simple always
  blocks
- Timing diagrams 

Chapter 3

- logic levels and noise margins
- transistor switches, nmos/pmos
- nmos circuits (nmos pulldown network, pullup resistor)
- CMOS circuits (nmos pulldown, pmos pullup networks)
- complex gates
- chip packages
- PLA (AND/OR, NOR/NOR)
- Look Up Tables (LUT), using MUX to generate logic
- propogation delay, rise and fall time
- delay caused by charging/discharging capacitors
- transmission gates and tri-state gates

Chapter 4

- Karnaugh maps (3, 4, and 5 variables)
- incompletely specified functions (don't-cares)
- multiple output functions
- SOP/POS reductions from K-maps
- multilevel circuits (factoring)
- bubble-pushing in circuit networks (i.e. NAND/NAND)
- Quine-McClusky tabular minimization (with and without don't-cares)