DSM Problems

Efficient hardware relies on objects with a uniform, large size; programs use objects of varying, usually small size. In the DSM milieu this results in false sharing.
Interconnect bandwidths are usually smaller than main memory bandwidths and interconnect latencies are usually larger than main memory latencies. Traversing the interconnect to satisfy a cache miss is much more serious than going to main memory.
The dynamic data sharing patterns of programs differ. As a result, a single consistency protocol does not work well for all programs.