Utah Arch

Architecture research at Utah covers a wide spectrum of topics, from embedded processors to high-performance multi-cores, from VLSI/asynchronous circuits to microarchitecture to compiler/OS explorations. Recent efforts have focused on the following:

• Custom hardware for raytracing
• Programmable customized architectures for embedded perception
• Photonics for many-core communication
• Custom architectures for OS execution
• Wire aware architectures/Interconnect design for multi-cores
• Design of large last-level caches for multi-cores
• Transactional Memory
• 3D die-stacked architectures
• Reliable processor architectures
• Asynchronous circuits and systems

News

• Paper titled Towards Scalable, Energy-Efficient, Bus-Based On-Chip Networks to appear at HPCA 2010.
• Best paper award at the 16th International Conference on High Performance Computing (HiPC 2009) for the paper Non-Uniform Power Access in Large Caches with Low-Swing Wires, Aniruddha Udipi, Naveen Muralimanohar, Rajeev Balasubramonian.
• Niti Madan selected as a Computing Innovation Fellow, a highly selective post-doctoral program. Niti will be working with Pradip Bose at IBM T.J. Watson.
• Niti Madan successfully defends her Ph.D. thesis (Jan'09).
• Paper on wide SIMD architecture for stream ray tracing accepted for publication at ASPLOS-2009.
• Two papers selected for publication at HPCA-2009: one on dynamic page movement in a NUCA cache and another on a 3D reconfigurable SRAM-DRAM cache.
• Naveen Muralimanohar successfully defends his Ph.D. thesis(Sept'08) and joins HP Labs.
• Prof. Mary Hall joins the faculty at Utah.
• Best Paper Award at the 2008 IEEE International Symposium on Application Specific Processors (SASP) for the paper TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing, Josef Spjut, Danny Kopta, Solomon Boulos, Spencer Kellis, and Erik Brunvand
• Paper on CACTI 6.0 (work appearing in ISCA'07 and MICRO'07 papers) selected for IEEE Micro's Top Picks of 2007 issue.